
PIC18F45J10 FAMILY
DS39682C-page 344
Preliminary
2007 Microchip Technology Inc.
Prescaler...................................................................125
Software Interrupt .....................................................125
Capture (ECCP Module)...................................................132
Capture/Compare/PWM (CCP).........................................123
Capture Mode.
See
Capture.
CCP Modules and Timer Resources ........................124
CCPRxH Register.....................................................124
CCPRxL Register......................................................124
Compare Mode.
See
Compare.
Interactions Between ECCP1/CCP1 and CCP2 for
Timer Resources...............................................124
Module Configuration................................................124
Clock Sources.....................................................................26
Default System Clock on Reset ..................................27
Selection Using OSCCON Register............................27
CLRF.................................................................................257
CLRWDT...........................................................................257
Code Examples
16 x 16 Signed Multiply Routine .................................78
16 x 16 Unsigned Multiply Routine .............................78
8 x 8 Signed Multiply Routine .....................................77
8 x 8 Unsigned Multiply Routine .................................77
Changing Between Capture Prescalers....................125
Computed GOTO Using an Offset Value....................50
Erasing a Flash Program Memory Row......................72
Fast Register Stack.....................................................50
How to Clear RAM (Bank 1) Using Indirect
Addressing..........................................................61
Implementing a Real-Time Clock Using a
Timer1 Interrupt Service ...................................119
Initializing PORTA.......................................................94
Initializing PORTB.......................................................97
Initializing PORTC.....................................................100
Initializing PORTD.....................................................103
Initializing PORTE.....................................................106
Loading the SSP1BUF (SSP1SR) Register..............148
Reading a Flash Program Memory Word ...................71
Saving STATUS, WREG and BSR Registers in RAM 91
Writing to Flash Program Memory ..............................74
Code Protection ................................................................229
COMF................................................................................258
Comparator.......................................................................219
Analog Input Connection Considerations..................223
Associated Registers ................................................223
Configuration.............................................................220
Effects of a Reset......................................................222
Interrupts...................................................................222
Operation ..................................................................221
Operation During Sleep ............................................222
Outputs .....................................................................221
Reference .................................................................221
External Signal..................................................221
Internal Signal...................................................221
Response Time.........................................................221
Comparator Specifications................................................308
Comparator Voltage Reference ........................................225
Accuracy and Error ...................................................226
Associated Registers ................................................227
Configuring................................................................225
Connection Considerations.......................................226
Effects of a Reset......................................................226
Operation During Sleep ............................................226
Compare (CCP Module)....................................................126
Associated Registers ................................................127
CCPRx Register........................................................126
Pin Configuration...................................................... 126
Software Interrupt..................................................... 126
Special Event Trigger ....................................... 126, 218
Timer1 Mode Selection............................................. 126
Compare (ECCP Module)................................................. 132
Special Event Trigger ............................................... 132
Computed GOTO................................................................ 50
Configuration Bits ............................................................. 229
Configuration Register Protection..................................... 240
Context Saving During Interrupts........................................ 91
CPFSEQ........................................................................... 258
CPFSGT ........................................................................... 259
CPFSLT............................................................................ 259
Crystal Oscillator/Ceramic Resonator................................. 23
Customer Change Notification Service............................. 353
Customer Notification Service .......................................... 353
Customer Support............................................................. 353
D
Data Addressing Modes ..................................................... 61
Comparing Addressing Modes with the
Extended Instruction Set Enabled ...................... 64
Direct .......................................................................... 61
Indexed Literal Offset ................................................. 63
Instructions Affected........................................... 63
Indirect........................................................................ 61
Inherent and Literal..................................................... 61
Data Memory ...................................................................... 53
Access Bank............................................................... 55
and the Extended Instruction Set ............................... 63
Bank Select Register (BSR) ....................................... 53
General Purpose Registers ........................................ 55
Map for PIC18F24J10/44J10...................................... 54
Special Function Registers......................................... 56
DAW ................................................................................. 260
DC and AC Characteristics
Graphs and Tables................................................... 329
DC Characteristics............................................................ 305
Power-Down and Supply Current............................. 298
Supply Voltage ......................................................... 297
DCFSNZ ........................................................................... 261
DECF................................................................................ 260
DECFSZ ........................................................................... 261
Default System Clock ......................................................... 27
Development Support....................................................... 291
Device Overview................................................................... 7
Details on Individual Family Members.......................... 8
Features (table) ............................................................ 9
New Core Features....................................................... 7
Other Special Features................................................. 8
Direct Addressing ............................................................... 62
E
Effect on Standard PIC Instructions.................................. 288
Effects of Power-Managed Modes on Various
Clock Sources............................................................. 28
Electrical Characteristics .................................................. 295
Enhanced Capture/Compare/PWM (ECCP)..................... 131
Associated Registers................................................ 144
Capture and Compare Modes .................................. 132
Capture Mode.
See
Capture (ECCP Module).
Outputs and Configuration........................................ 132
Pin Configurations for ECCP1 Modes ...................... 132
PWM Mode.
See
PWM (ECCP Module).
Standard PWM Mode ............................................... 132
Timer Resources ...................................................... 132