參數(shù)資料
型號(hào): PIC18F47J53-I/PT
廠商: Microchip Technology
文件頁數(shù): 49/71頁
文件大?。?/td> 0K
描述: IC PIC MCU 128KB FLASH 44TQFP
產(chǎn)品培訓(xùn)模塊: 8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 160
系列: PIC® XLP™ 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,LIN,SPI,UART/USART,USB
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲(chǔ)器容量: 128KB(64K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 3.8K x 8
電壓 - 電源 (Vcc/Vdd): 2.15 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x10b/12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 管件
配用: MA180029-ND - BOARD DEMO PIC18F47J53 FS USB
2010-2012 Microchip Technology Inc.
DS41412F-page 53
PIC18(L)F2X/4XK22
FIGURE 3-7:
TRANSITION TIMING FOR WAKE FROM IDLE TO RUN MODE
3.4.3
RC_IDLE MODE
In RC_IDLE mode, the CPU is disabled but the periph-
erals continue to be clocked from the internal oscillator
block from the HFINTOSC multiplexer output. This
mode allows for controllable power conservation during
Idle periods.
From RC_RUN, this mode is entered by setting the
IDLEN bit and executing a SLEEP instruction. If the
device is in another Run mode, first set IDLEN, then set
the SCS1 bit and execute SLEEP. It is recommended
that SCS0 also be cleared, although its value is
ignored, to maintain software compatibility with future
devices. The HFINTOSC multiplexer may be used to
select a higher clock frequency by modifying the IRCF
bits before executing the SLEEP instruction. When the
clock source is switched to the HFINTOSC multiplexer,
the primary oscillator is shut down and the OSTS bit is
cleared.
If the IRCF bits are set to any non-zero value, or either
the INTSRC or MFIOSEL bits are set, the HFINTOSC
output is enabled. Either the HFIOFS or the MFIOFS
bits become set, after the HFINTOSC output stabilizes
after an interval of TIOBST. For information on the
HFIOFS and MFIOFS bits, see Table 3-2.
Clocks
to
the
peripherals
continue
while
the
HFINTOSC source stabilizes. The HFIOFS and
MFIOFS bits will remain set if the IRCF bits were
previously set at a non-zero value or if INTSRC was set
before the SLEEP instruction was executed and the
HFINTOSC source was already stable. If the IRCF bits
and INTSRC are all clear, the HFINTOSC output will
not be enabled, the HFIOFS and MFIOFS bits will
remain clear and there will be no indication of the
current clock source.
When a wake event occurs, the peripherals continue to
be clocked from the HFINTOSC multiplexer output.
After a delay of TCSD following the wake event, the
CPU begins executing code being clocked by the
HFINTOSC multiplexer. The IDLEN and SCS bits are
not affected by the wake-up. The LFINTOSC source
will continue to run if either the WDT or the Fail-Safe
Clock Monitor is enabled.
OSC1
Peripheral
Program
PC
CPU Clock
Q1
Q3
Q4
Clock
Counter
Q2
Wake Event
TCSD
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PIC18F47J53T-I/PT 功能描述:8位微控制器 -MCU USB 128KB Flash 4KB RAM 12 MIPS 12b ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC18F6310-E/PT 功能描述:8位微控制器 -MCU 16kBF 768RM 68I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC18F6310-I/PT 功能描述:8位微控制器 -MCU 16kBF 768RM 68I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
PIC18F6310-I/PT 制造商:Microchip Technology Inc 功能描述:8 Bit Microcontroller Clock Speed:40MHz