
2006 Microchip Technology Inc.
Advance Information
DS39762A-page 389
PIC18F97J60 FAMILY
Example:
RCALL
Relative Call
Syntax:
RCALL n
Operands:
-1024
≤
n
≤
1023
(PC) + 2
→
TOS,
(PC) + 2 + 2n
→
PC
Operation:
Status Affected:
None
Encoding:
1101
1nnn
nnnn
nnnn
Description:
Subroutine call with a jump up to 1K
from the current location. First, return
address (PC + 2) is pushed onto the
stack. Then, add the 2’s complement
number ‘2n’ to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is a
two-cycle instruction.
Words:
1
Cycles:
2
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read literal
‘n’
PUSH PC
to stack
No
operation
Process
Data
Write to PC
No
operation
No
operation
No
operation
Example:
HERE
RCALL Jump
Before Instruction
PC =
After Instruction
PC =
TOS =
Address
(HERE)
Address
(Jump)
Address
(HERE + 2)
RESET
Reset
Syntax:
RESET
Operands:
None
Operation:
Reset all registers and flags that are
affected by a MCLR Reset.
Status Affected:
All
Encoding:
0000
0000
1111
1111
Description:
This instruction provides a way to
execute a MCLR Reset in software.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Start
reset
Q3
No
Q4
No
Decode
operation
operation
RESET
After Instruction
Registers =
Flags*
Reset Value
Reset Value
=