參數(shù)資料
型號: PIC18LF2450T-I/SO
廠商: Microchip Technology
文件頁數(shù): 10/143頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 8KX16 28SOIC
標(biāo)準(zhǔn)包裝: 1,600
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 48MHz
連通性: UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,HLVD,POR,PWM,WDT
輸入/輸出數(shù): 23
程序存儲器容量: 16KB(8K x 16)
程序存儲器類型: 閃存
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
包裝: 帶卷 (TR)
PIC18F2450/4450
2006 Microchip Technology Inc.
Advance Information
DS39760A-page 105
TABLE 9-5:
PORTC I/O SUMMARY
Pin
Function
TRIS
Setting
I/O
I/O Type
Description
RC0/T1OSO/
T1CKI
RC0
0
OUT
DIG
LATC<0> data output.
1
IN
ST
PORTC<0> data input.
T1OSO
x
OUT
ANA
Timer1 oscillator output; enabled when Timer1 oscillator enabled.
Disables digital I/O.
T1CKI
1
IN
ST
Timer1 counter input.
RC1/T1OSI/
UOE
RC1
0
OUT
DIG
LATC<1> data output.
1
IN
ST
PORTC<1> data input.
T1OSI
x
IN
ANA
Timer1 oscillator input; enabled when Timer1 oscillator enabled.
Disables digital I/O.
UOE
0
OUT
DIG
External USB transceiver OE output.
RC2/CCP1
RC2
0
OUT
DIG
LATC<2> data output.
1
IN
ST
PORTC<2> data input.
CCP1
0
OUT
DIG
CCP1 Compare and PWM output; takes priority over port data.
1
IN
ST
CCP1 Capture input.
RC4/D-/VM
RC4
(1)
IN
TTL
PORTC<4> data input; disabled when USB module or on-chip
transceiver is enabled.
D-
(1)
OUT
XCVR
USB bus differential minus line output (internal transceiver).
(1)
IN
XCVR
USB bus differential minus line input (internal transceiver).
VM
(1)
IN
TTL
External USB transceiver VM input.
RC5/D+/VP
RC5
(1)
IN
TTL
PORTC<5> data input; disabled when USB module or on-chip
transceiver is enabled.
D+
(1)
OUT
XCVR
USB bus differential plus line output (internal transceiver).
1)
IN
XCVR
USB bus differential plus line input (internal transceiver).
VP
1)
IN
TTL
External USB transceiver VP input.
RC6/TX/CK
RC6
0
OUT
DIG
LATC<6> data output.
1
IN
ST
PORTC<6> data input.
TX
0
OUT
DIG
Asynchronous serial transmit data output (EUSART module); takes
priority over port data. User must configure as output.
CK
0
OUT
DIG
Synchronous serial clock output (EUSART module); takes priority
over port data.
1
IN
ST
Synchronous serial clock input (EUSART module).
RC7/RX/DT
RC7
0
OUT
DIG
LATC<7> data output.
1
IN
ST
PORTC<7> data input.
RX
1
IN
ST
Asynchronous serial receive data input (EUSART module).
DT
1
OUT
DIG
Synchronous serial data output (EUSART module).
1
IN
ST
Synchronous serial data input (EUSART module). User must
configure as an input.
Legend:
OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, XCVR = USB Transceiver, x = Don’t care (TRIS bit does not affect port direction or is
overridden for this option)
Note
1:
RC4 and RC5 do not have corresponding TRISC bits. In Port mode, these pins are input only. USB data direction is
determined by the USB configuration.
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