- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3810 > PIC18LF4682-I/PT (Microchip Technology)IC PIC MCU FLASH 40KX16 44TQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | PIC18LF4682-I/PT |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 19/183頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PIC MCU FLASH 40KX16 44TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | PIC® 18F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | CAN，I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，HLVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 36 |
| 程序存儲(chǔ)器容量： | 80KB（40K x 16） |
| 程序存儲(chǔ)器類型： | 閃存 |
| EEPROM 大小： | 1K x 8 |
| RAM 容量： | 3.25K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 11x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-TQFP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 646 (CN2011-ZH PDF) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁
2011 Microchip Technology Inc.
DS39931D-page 115
PIC18F46J50 FAMILY
9.0
INTERRUPTS
Devices of the PIC18F46J50 family have multiple inter-
rupt sources and an interrupt priority feature that allows
most interrupt sources to be assigned a high-priority
level or a low-priority level. The high-priority interrupt
vector is at 0008h and the low-priority interrupt vector
is at 0018h. High-priority interrupt events will interrupt
any low-priority interrupts that may be in progress.
There are 13 registers, which are used to control
interrupt operation. These registers are:
RCON
INTCON
INTCON2
INTCON3
PIR1, PIR2, PIR3
PIE1, PIE2, PIE3
IPR1, IPR2, IPR3
It is recommended that the Microchip header files
supplied with MPLAB IDE be used for the symbolic
bit names in these registers. This allows the
assembler/compiler to automatically take care of the
placement of these bits within the specified register.
In general, interrupt sources have three bits to control
their operation. They are:
Flag bit to indicate that an interrupt event
occurred
Enable bit that allows program execution to
branch to the interrupt vector address when the
flag bit is set
Priority bit to select high priority or low priority
The interrupt priority feature is enabled by setting the
IPEN bit (RCON<7>). When interrupt priority is
enabled, there are two bits which enable interrupts
globally. Setting the GIEH bit (INTCON<7>) enables all
interrupts that have the priority bit set (high priority).
Setting the GIEH and GIEL bits (INTCON<7:6>)
enables interrupts that have the priority bit cleared (low
priority). When the interrupt flag, enable bit and
appropriate Global Interrupt Enable bits are set, the
interrupt will vector immediately to address, 0008h or
0018h, depending on the priority bit setting. Individual
interrupts can be disabled through their corresponding
enable bits.
When the IPEN bit is cleared (default state), the
interrupt priority feature is disabled and interrupts are
compatible
with
PIC
mid-range
devices.
In
Compatibility mode, the interrupt priority bits for each
source have no effect. INTCON<6> is the PEIE bit,
which enables/disables all peripheral interrupt sources.
INTCON<7> is the GIE bit, which enables/disables all
interrupt sources. All interrupts branch to address,
0008h, in Compatibility mode.
When an interrupt is responded to, the Global Interrupt
Enable bit is automatically cleared by hardware to dis-
able further interrupts. If the IPEN bit is cleared, this is
the GIE bit. If interrupt priority levels are used, this will be
either the GIEH bit, if the interrupt was configured for
high-priority, or the GIEL bit, if the interrupt was config-
ured for low-priority. When executing in the interrupt
context, application firmware should not attempt to
manually re-enable the respective GIEH or GIEL bit that
was cleared in hardware. High-priority interrupt sources
can interrupt a low-priority interrupt. Low-priority inter-
rupts are not processed while high-priority interrupts are
in progress.
When an interrupt occurs, the return address is pushed
onto the stack and the PC is loaded with the interrupt
vector address (0008h or 0018h). Once in the Interrupt
Service Routine (ISR), the source(s) of the interrupt
can be determined by polling the interrupt flag bits. The
interrupt flag bit, or individual PIEx enable bit, must be
cleared in software before returning from the interrupt
handler to avoid recursive interrupts.
The “return from interrupt” instruction, RETFIE, exits
the interrupt routine and sets the GIE bit (GIEH or GIEL
if priority levels are used), which re-enables interrupts.
For external interrupt events, such as the INTx pins or
the PORTB input change interrupt, the interrupt latency
will be three to four instruction cycles. The exact
latency is the same for one or two-cycle instructions.
Individual interrupt flag bits are set regardless of the
status of their corresponding enable bit or the GIE bit.
Note:
Do not use the MOVFF instruction to modify
any of the interrupt control registers while
any
interrupt is enabled. Doing so may
cause erratic microcontroller behavior.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PIC32MX775F256L-80I/PF | IC MCU 32BIT 256K FLASH 100TQFP |
| PIC32MX575F512L-80I/PF | IC MCU 32BIT 512KB FLASH 100TQFP |
| PIC32MX695F512H-80I/MR | IC MCU 32BIT 512KB FLASH 64QFN |
| 6-100526-9 | Z-PACK F.CODING KEY |
| 100526-8 | Z-PACK F-CODING KEY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PIC18LF4685-I/ML | 功能描述:8位微控制器 -MCU 96KB FL 3KB RAM ECAN 1024 EEPROM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC18LF4685-I/P | 功能描述:8位微控制器 -MCU 96KB FL 3KB RAM ECAN 1024 EEPROM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC18LF4685-I/P | 制造商:Microchip Technology Inc 功能描述:8-Bit Microcontroller IC |
| PIC18LF4685-I/PT | 功能描述:8位微控制器 -MCU 96KB FL 3KB RAM ECAN 1024 EEPROM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC18LF4685T-I/ML | 功能描述:8位微控制器 -MCU 96KB FL 3KB RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。