參數(shù)資料
型號: PIC24FJ128GB110-I/PF
廠商: Microchip Technology
文件頁數(shù): 4/22頁
文件大小: 0K
描述: IC PIC MCU FLASH 100TQFP
標(biāo)準(zhǔn)包裝: 90
系列: PIC® 24F
核心處理器: PIC
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,SPI,UART/USART,USB OTG
外圍設(shè)備: 欠壓檢測/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 83
程序存儲器容量: 128KB(43K x 24)
程序存儲器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 648 (CN2011-ZH PDF)
配用: 876-1004-ND - PIC24 BREAKOUT BOARD
PIC24FJ256GB110 FAMILY
DS80369N-page 12
2008-2011 Microchip Technology Inc.
36. Module: UART
When using UTXISEL<1:0> = 01 (interrupt when
last character is shifted out of the Transmit Shift
Register), and the final character is being shifted
out through the Transmit Shift Register, the TX
interrupt may occur before the final bit is shifted
out.
Work around
If it is critical that the interrupt processing occurs
only when all transmit operations are complete,
after which, the following work around can be
implemented:
Hold off the interrupt routine processing by adding
a loop at the beginning of the routine that polls the
Transmit Shift Register empty bit, as shown in
Affected Silicon Revisions
37. Module: USB (Device Mode)
In previous literature for this module, the
EPSTALL bits (U1EPn<1>) are described as
being only stall status indicator bits in Device
mode. In actual implementation, the EPSTALL
bits function as both status and control bits.
If the EPSTALL bit for endpoint ‘n’ is set (either
by the SIE hardware or manually in firmware),
both the IN and OUT endpoints, associated with
the endpoint, will send STALL packets when the
endpoint’s UOWN bit (BDnSTAT<15>) is also
set.
Work around
For Host Applications: No work around is
needed as hosts do not send STALL packets.
For Device Mode Applications: When it is neces-
sary to stop sending STALL packets on an
endpoint, clear the endpoint’s respective
BSTALL (BDnSTAT<10>) and EPSTALL bits. If
the application firmware was developed based
on one of the examples in the Microchip USB
framework, this is already the default behavior of
the USB stack firmware (except Version 2.8); no
further work around is normally needed.
If a Device mode application was based upon
Version 2.8 of the USB framework, and the
application uses STALL packets on any of the
application endpoints (1-15), it is suggested to
update the application to the latest version.
Affected Silicon Revisions
EXAMPLE 2:
DELAYING THE ISR BY POLLING THE TRMT BIT
A3
A5
A6
XX
X
A3
A5
A6
XX
X
// in UART2 initialization code
...
U2STAbits.UTXISEL0
= 1;
// Set to generate TX interrupt when all
U2STAbits.UTXISEL1
= 0;
// transmit operations are complete.
...
U2TXInterrupt(void)
{
while(U2STAbits.TRMT==0);
// wait for the transmit buffer to be empty
...
// process interrupt
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