- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3815 > PIC32MX664F064L-I/BG (Microchip Technology)MCU PIC 64KB FLASH 121XBGA PDF資料下載
參數(shù)資料
| 型號： | PIC32MX664F064L-I/BG |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | MCU PIC 64KB FLASH 121XBGA |
| 特色產(chǎn)品： | PIC32 32-Bit MCU Families |
| 標(biāo)準(zhǔn)包裝： | 184 |
| 系列： | PIC® 32MX |
| 核心處理器： | MIPS32? M4K? |
| 芯體尺寸： | 32-位 |
| 速度： | 80MHz |
| 連通性： | 以太網(wǎng)，I²C，SPI，UART/USART，USB OTG |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，DMA，POR，PWM，WDT |
| 程序存儲器容量： | 64KB（64K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 32K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.3 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 16x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 121-TFBGA |
| 包裝： | 托盤 |
2010-2012 Microchip Technology Inc.
DS80511G-page 7
PIC32MX534/564/664/764
18. Module: I2C
The slave address, 0x78, is one of a group of
reserved addresses. It is used as the upper byte of
a 10-bit address when 10-bit addressing is
enabled. The I2C module control register allows
the programmer to enable both 10-bit addressing
and strict enforcement of reserved addressing,
with the A10M and STRICT bits, respectively.
When both bits are cleared, the device should
respond to the reserved address 0x78, but it does
not.
Work around
None.
Affected Silicon Revisions
19. Module: USB
If the bus has been idle for more than 3 ms, the
UIDLE interrupt flag is set. If software clears the
interrupt flag, and the bus remains idle, the UIDLE
interrupt flag will not be set again.
Work around
Software can leave the UIDLE bit set until it has
received some indication of bus resumption.
(Resume, Reset, SOF, or Error).
Affected Silicon Revisions
20. Module: CPU
When both prefetch and instruction cache are
enabled, a Data Bus Exception (DBE) may occur if
an interrupt is encountered by the CPU while it is
accessing constant data (not instructions) from
Flash memory.
Work around
To avoid a DBE, use one of the following two
solutions:
1.
Structure application code, such that inter-
rupts are not used while the CPU is accessing
data from Flash memory.
2.
Disable either the Prefetch module or CPU
cache functionality as follows (by default both
are disabled on a Power-on Reset (POR)):
a)
To disable the Prefetch module, set the
Predictive
Prefetch
Enable
bits,
PREFEN<1:0>, in the Cache Control
Register, CHECON<6:5>, to ‘00’.
b)
To disable CPU cache, set the Kseg0
bits, K0<2:0>, in the CP0 Configuration
Register, Config<2:0>, to ‘010’.
Affected Silicon Revisions
21. Module: CPU
During normal operation, if a CPU write operation
is interrupted by an incoming interrupt, it should be
aborted (not completed) and resumed after the
interrupt is serviced. However, some of these write
operations may not be aborted, resulting in a
double write to peripherals by the CPU (the first
write during the interrupt and the second write after
the interrupt is serviced).
Work around
Most peripherals are not affected by this issue, as
a double write will not have a negative impact.
However, the following communication peripherals
will double-send data if their respective transmit
buffers are written twice: SPI, I2C, UART and PMP.
To avoid double transmission of data, utilize DMA
to transfer data to these peripherals or disable
interrupts while writing to these peripherals.
Affected Silicon Revisions
A0
A1
A2
XX
X
Note:
Resume and Reset are the only interrupts
that should be following UIDLE assertion.
If the UIDLE bit is set, it should be okay to
suspend the USB module (as long as this
code is protected by the GUARD and/or
ACTPEND logic). This will require soft-
ware to clear the UIDLE interrupt enable
bit to exit the USB ISR (if using interrupt
driven code).
A0
A1
A2
XX
X
Note:
Disabling either the cache or Prefetch
module will have minimum performance
degradation, with a typical application
realizing 10 percent or less performance
impact.
A0
A1
A2
XX
X
A0
A1
A2
XX
X
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PIC32MX564F128L-I/BG | MCU PIC 128KB FLASH 121XBGA |
| PIC32MX360F256L-80V/BG | IC MCU 32BIT 256KB FLASH 121XBGA |
| PIC32MX675F256H-80I/PT | IC MCU 32BIT 256KB FLASH 64TQFP |
| PIC24FJ256DA206-I/MR | MCU PIC 16BIT FLASH 256K 64VQFN |
| PIC32MX764F128L-I/PT | MCU PIC 128KB FLASH 100TQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PIC32MX664F064LT-I/BG | 功能描述:32位微控制器 - MCU 100PINS 64KB 32KBRM 80MHz USB ETH 4DMA RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
| PIC32MX664F064LT-I/PF | 功能描述:32位微控制器 - MCU 100PINS 64KB 32KBRM 80MHz USB ETH 4DMA RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
| PIC32MX664F064LT-I/PT | 功能描述:32位微控制器 - MCU 100PINS 64KB 32KBRM 80MHz USB ETH 4DMA RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
| PIC32MX664F064LT-V/BG | 功能描述:32位微控制器 - MCU 64KB/32KB USB OTG 80 MHZ 10-B ADC DMA RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
| PIC32MX664F064LT-V/PF | 功能描述:32位微控制器 - MCU 64KB/32KB USB OTG 80 MHZ 10-B ADC DMA RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。