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參數(shù)資料
| 型號： | PK10N512VLL100 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 9/71頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ARM CORTEX MCU 512K 100-LQFP |
| 產(chǎn)品培訓模塊： | Kinetis® Cortex-M4 Microcontroller Family |
| 標準包裝： | 1 |
| 系列： | Kinetis |
| 核心處理器： | ARM? Cortex?-M4 |
| 芯體尺寸： | 32-位 |
| 速度： | 100MHz |
| 連通性： | CAN，EBI/EMI，I²C，IrDA，SDHC，SPI，UART/USART |
| 外圍設備： | DMA，I²S，LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 70 |
| 程序存儲器容量： | 512KB（512K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 128K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.71 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 29x16b，D/A 1x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 105°C |
| 封裝/外殼： | 100-LQFP |
| 包裝： | 托盤 |
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Table 6. Power consumption operating behaviors (continued)
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
IDD_VBAT Average current when CPU is not accessing RTC
registers
@ 1.8V
@ –40 to 25°C
@ 70°C
@ 105°C
@ 3.0V
@ –40 to 25°C
@ 70°C
@ 105°C
—
0.71
1.01
2.82
0.84
1.17
3.16
0.81
1.3
4.3
0.94
1.5
4.6
μA
1. The analog supply current is the sum of the active or disabled current for each of the analog modules on the device. See
each module's specification for its supply current.
2. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock . MCG configured for FEI mode.
All peripheral clocks disabled.
3. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock. MCG configured for FEI mode. All
peripheral clocks enabled.
4. Max values are measured with CPU executing DSP instructions.
5. 25MHz core and system clock, 25MHz bus clock, and 12.5MHz FlexBus and flash clock. MCG configured for FEI mode.
6. 2 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
disabled. Code executing from flash.
7. 2 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
enabled but peripherals are not in active operation. Code executing from flash.
8. 2 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
disabled.
9. Data reflects devices with 128 KB of RAM.
10. Includes 32kHz oscillator current and RTC operation.
5.2.5.1 Diagram: Typical IDD_RUN operating behavior
The following data was measured under these conditions:
MCG in FBE mode for 50 MHz and lower frequencies. MCG in FEE mode at greater
than 50 MHz frequencies.
No GPIOs toggled
Code execution from flash with cache enabled
For the ALLOFF curve, all peripheral clocks are disabled except FTFL
General
K10 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
Freescale Semiconductor, Inc.
17
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PK10N512VLL100 | 制造商:Freescale Semiconductor 功能描述:KINETIS 512K |
| PK10N512VLL100R | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet |
| PK10N512VLL120 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet |
| PK10N512VLL120R | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet |
| PK10N512VLL150 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:K10 Sub-Family Data Sheet |
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