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參數(shù)資料
| 型號： | PKD01BIEP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁數(shù)： | 3/18頁 |
| 文件大?。?/td> | 402K |
| 代理商： | PKD01BIEP |
REV. A
PKD01
–11–
THEORY OF OPERATION
The typical peak detector uses voltage amplifiers and a diode or
an emitter follower to charge the hold capacitor, CH, indirect-
ionally (see Figure 1). The output impedance of A plus D1’s
dynamic impedance, rd, make up the resistance which deter-
mines the feedback loop pole. The dynamic impedance is
r
kT
qI
d
=
, where Id is the capacitor charging current.
The pole moves toward the origin of the S plane as Id goes to
zero. The pole movement in itself will not significantly lengthen
the acquisition time since the pole is enclosed in the system
feedback loop.
CH
VOUT
INPUT
VIN
VH
VOUT (A) = V IN (A)
AV (A)
A
+
C
D1
ROUT
rd
OUTPUT
Figure 1. Conventional Voltage Amplifier Peak Detector
When the moving pole is considered with the typical frequency
compensation of voltage amplifiers however, there is a loop stability
problem. The necessary compensation can increase the required
acquisition time. ADI’s approach replaces the input voltage ampli-
fier with a transconductance amplifier (see Figure 2).
The PKD01 transfer function can be reduced to:
V
sC
gg R
sC
g
OUT
IN
H
mm
OUT
H
m
=
++
≈
+
1
where: g
m
1
A/mV, ROUT
20 M
.
The diode in series with A’s output (see Figure 2) has no effect
because it is a resistance in series with a current source. In
addition to simplifying the system compensation, the input
transconductance amplifier output current is switched by cur-
rent steering. The steered output is clamped to reduce and match
any charge injection.
CH
C
ROUT
IOUT
D1
INPUT
VIN
VH
IOUT (A) = V IN (A)
gm (A)
A
VOUT
OUTPUT
Figure 2. Transconductance Amplifier Peak Detector
Figure 3 shows a simplified schematic of the reset gm amplifier,
B. In the track mode, Q1 and Q4 are ON and Q2 and Q3 are
OFF. A current of 2I passes through D1, I is summed at B and
passes through Q1, and is summed with gmVIN. The current sink
can absorb only 3I, thus the current passing through D2 can
only be: 2K – gm VIN. The net current into the hold capacitor
node then, is gmVIN [IH = 2I – (2I – gmVIN)]. In the hold mode,
Q2 and Q3 are ON while Q1 and Q4 are OFF. The net current
into the top of D1 is –I until D3 turns ON. With Q1 OFF, the
bottom of D2 is pulled up with a current I until D4 turns ON,
thus, D1 and D2 are reverse biased by <0.6 V, and charge injec-
tion is independent of input level.
The monolithic layout results in points A and B having equal
nodal capacitance. In addition, matched diodes D1 and D2 have
equal diffusion capacitance. When the transconductance ampli-
fier outputs are switched open, points A and B are ramped
equally, but in opposite phase. Diode clamps D3 and D4 cause
the swings to have equal amplitudes. The net charge injection
(voltage change) at node C is therefore zero.
V+
gm V IN
VIN
3I
V–
I
2I
D3
D1
D4
CH
C
Q1 Q2
Q3 Q4
A
B
LOGIC
CONTROL
A > B = PEAK DETECT
A < B = PEAK HOLD
A
D2
C
B
6
Figure 3. Transconductance Amplifier with Low Glitch
Current Switch
The peak transconductance amplifier, A is shown in Figure 4.
Unidirectional hold capacitor charging requires diode D1 to be
connected in series with the output. Upon entering the peak
hold mode D1 is reverse-biased. The voltage clamp limits charge
injection to approximately 1 pC and the hold step to 0.6 mV.
Minimizing acquisition time dictates a small CH capacitance. A
1000 pF value was selected. Droop rate was also minimized by
providing the output buffer with an FET input stage. A cur-
rent cancellation circuit further reduces droop current and
minimizes the gate current’s tendency to double for every 10
°
temperature change.
gm V IN
VIN
3I
V–
V+
I
2I
D3
D1
D2
D4
CH
C
Q1 Q2
Q3 Q4
A
B
LOGIC
CONTROL
A > B = PEAK DETECT
A < B = PEAK HOLD
rd
6
Figure 4. Peak Detecting Transconductance Amplifier
with Switched Output
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PKD01BIEY | 制造商:Rochester Electronics LLC 功能描述: |
| PKD01BY | 制造商:Analog Devices 功能描述: |
| PKD01BY/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peak Detector |
| PKD01EP | 制造商:Analog Devices 功能描述:Sample and Hold 2-CH 70us 14-Pin PDIP 制造商:Analog Devices 功能描述:SEMICONDUCTORS |
| PKD01EPZ | 制造商:Analog Devices 功能描述:Sample and Hold 2-CH 70us 14-Pin PDIP 制造商:Analog Devices 功能描述:Sample & Hold Amplifier |
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