- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370007 > PLSI1016E100LT44I (Lattice Semiconductor Corporation) High-Density Programmable Logic PDF資料下載
參數(shù)資料
| 型號： | PLSI1016E100LT44I |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | High-Density Programmable Logic |
| 中文描述： | 高密度可編程邏輯 |
| 文件頁數(shù)： | 7/15頁 |
| 文件大?。?/td> | 208K |
| 代理商： | PLSI1016E100LT44I |
7
1996 ISP Encyclopedia
Specifications
ispLSI and pLSI 1016E
Internal Timing Parameters
1
t
ob
t
sl
t
oen
t
odis
t
goe
1. Internal Timing Parameters are not tested and are for reference only.
2. Refer to Timing Model in this data sheet for further details.
Table 2-0037-16/125,100,80
Outputs
UNITS
-125
MIN.
-100
MIN.
MAX.
MAX.
DESCRIPTION
#
2
PARAMETER
49 Output Buffer Delay
50 Output Slew Limited Delay Adder
51 I/O Cell OE to Output Enabled
52 I/O Cell OE to Output Disabled
–
–
–
–
–
–
–
–
1.7
10.0
5.3
5.3
ns
ns
ns
ns
t
gy0
t
gy1/2
t
gcp
t
ioy1/2
t
iocp
54 Clock Delay, Y0 to Global GLB Clock Line (Ref. clock)
1.3
1.4
1.4
ns
Global Reset
t
gr
1.4
10.0
4.3
4.3
Clocks
1.3
59 Global Reset to GLB and I/O Registers
–
–
5.5
ns
3.2
53 Global Output Enable
–
–
3.7
ns
2.7
55 Clock Delay, Y1 or Y2 to Global GLB Clock Line
56 Clock Delay, Clock GLB to Global GLB Clock Line
57 Clock Delay, Y1 or Y2 to I/O Cell Global Clock Line
58 Clock Delay, Clock GLB to I/O Cell Global Clock Line
2.3
0.8
0.0
0.8
2.4
0.8
0.0
0.8
2.9
1.8
0.4
1.8
ns
ns
ns
ns
2.7
1.8
0.3
1.8
-80
MIN. MAX.
–
–
–
–
–
3.0
10.0
6.4
6.4
–
4.1
4.5
2.1
2.1
3.6
1.2
0.0
1.2
4.4
2.7
0.6
2.7
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PLSI1016E125LJI | High-Density Programmable Logic |
| PLSI1016E125LT44 | High-Density Programmable Logic |
| PLSI1016E125LT44I | High-Density Programmable Logic |
| PLSI1016E80LJ | High-Density Programmable Logic |
| PLSI1016E80LJI | High-Density Programmable Logic |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PLSI1016E125LJ | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic |
| PLSI1016E125LJI | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic |
| PLSI1016E125LT44 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic |
| PLSI1016E125LT44I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic |
| PLSI1016E80LJ | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。