參數(shù)資料
型號: PLSI1032-60LJI
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: KPSE06F14-15PF0
中文描述: EE PLD, 25 ns, PQCC84
封裝: PLASTIC, LCC-84
文件頁數(shù): 9/19頁
文件大?。?/td> 256K
代理商: PLSI1032-60LJI
Specifications
ispLSI and pLSI 1032
9
1996 ISP Encyclopedia
Maximum GRP Delay vs GLB Loads
ispLSI and pLSI 1032-80
ispLSI and pLSI 1032-60
ispLSI and pLSI 1032-90
0126A-80-32-isp
1
2
3
4
8
12
16
GLB Loads
G
4
5
6
0
Power Consumption
used. Figure 3 shows the relationship between power
and operating speed.
Power consumption in the ispLSI and pLSI 1032 device
depends on two primary factors: the speed at which the
device is operating, and the number of Product Terms
Figure 3. Typical Device Power Consumption vs fmax
50
100
150
200
250
0
10
20
30
40
50
60
70
f
max (MHz)
I
C
80
Notes: Configuration of eight 16-bit Counters
Typical Current at 5V, 25C
ispLSI and pLSI 1032
0127A-32-80-isp
ICC can be estimated for the ispLSI and pLSI 1032 using the following equation:
ICC = 52 + (# of PTs * 0.30) + (# of nets * Max. freq * 0.009) where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max. freq = Highest Clock Frequency to the device
The ICC estimate is based on typical conditions (VCC = 5.0V, room temperature) and an assumption of 2 GLB loads on
average exists. These values are for estimates only. Since the value of ICC is sensitive to operating conditions and the
program in the device, the actual ICC should be verified.
相關(guān)PDF資料
PDF描述
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PLSI1032-60LT 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic
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