![](http://datasheet.mmic.net.cn/330000/PM73487-PI_datasheet_16444394/PM73487-PI_153.png)
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATMTraffic Management Device
Released
Datasheet
141
7.2.24
TX_DIR_CONFIG
Address: 1F0008
h
(7C0020
h
byte)
Type: Read/Write
Format: Refer to the following table.
7.2.25
TX_DIR_STATE (Internal Structure)
Address: 1F0009
h
(7C0024
h
byte)
Type: Read/Write – Write only during SW_RESET (refer to
“SW_RESET” on
page 101
). Do not update this register.
Format: Refer to the following table.
Field (Bits)
Description
Not used
(31:16)
Write with a 0 to maintain software compatibility with future versions.
Reserved
(15:12)
Write with a 3.
TX_DIR_EXP_CONG_QD
(11:8)
Exponent of the congested queue depth (this is the number of empty cell buffers below
which the device will enter the empty congestion state). Initialize to the proper setting.
The congestion state is entered when the number of free buffers drops below this thresh-
old, and the congestion state is exited when the number of free buffers exceeds twice
this threshold.
NOTE: This field determines the number of empty buffers rather than the number
of full buffers.
Not used
(7:0)
Write with a 0 to maintain software compatibility with future versions.
Field (Bits)
Description
Not used
(31:18)
Write with a 0 to maintain software compatibility with future versions.
Reserved
(17)
Initialize to 0 at initial setup. Software modifications to this location after setup may
cause incorrect operation.
TX_DIR_E_CONG_STATE
(16)
Current empty congestion state. Initialize to 0. This bit is read-only.
TX_DIR_E_CUR_QD
(15:0)
Current count of empty cells in the transmit direction. Initialize to the number of cells
setting.
NOTE: The number of buffers is limited to the physical number of buffers minus
two.