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Philips Semiconductors Objective Short Form Specification Rev. 2.0 February 2004
PN531
μC based Transmission module
3.2 Pin Description
Pin
Symbol
Type
Pad Ref
Voltage
Description
1
DVSS
PWR
Digital Ground
2
LOADMOD
O
DVDD
Load Modulation output provides digital signal for FeliCa and MIFARE
card operating mode
3
TVSS1
PWR
Transmitter Ground: supplies the output stage of TX1 and TX2
4
TX1
O
TVDD
Transmitter 1: delivers the modulated 13.56 MHz energy carrier
5
TVDD
PWR
Transmitter power supply: supplies the output stage of TX1 and TX2
6
TX2
O
TVDD
Transmitter 2: delivers the modulated 13.56 MHz energy carrier
7
TVSS2
PWR
Transmitter Ground: supplies the output stage of TX1 and TX2
8
AVDD
PWR
Analog Power Supply
9
VMID
PWR
AVDD
Internal Reference Voltage: This pin delivers the internal reference voltage.
10
RX
I
AVDD
Receiver Input: Input pin for the reception signal, which is the load
modulated 13.56 MHz energy carrier from the antenna circuit.
11
AVSS
PWR
Analog Ground
12
AUX1
O
DVDD
Auxiliary Output: This pin delivers analog and digital test signals.
13
AUX2
O
DVDD
Auxiliary Output: This pin delivers analog and digital test signals.
14
OSCIN
I
AVDD
Crystal Oscillator Input: input to the inverting amplifier of the oscillator. This
pin is also the input for an externally generated clock (fosc = 27.12 MHz).
15
OSCOUT
O
AVDD
Crystal Oscillator output: Output of the inverting amplifier of the oscillator.
16
I0
I
DVDD
Interface mode lines: selects the used host interface. In test mode I0 is
used as test signals.
17
I1
I
DVDD
Interface mode lines: selects the used host interface. In test mode I0 is
used as test signals.
18
TESTEN
I
DVDD
Test enable pin: When set to 1 enable the test mode. When set to 0 reset
the TCB and disable the access to the test mode.
19
OSC2OUT
O
DVDD
Crystal Oscillator output: Output of the inverting amplifier of the oscillator
for the USB clock.
20
OSC2IN
I
DVDD
Crystal Oscillator Input: input to the inverting amplifier of the oscillator for
the USB clock generation. This pin is also the input for an externally
generated clock (f
osc
=4 MHz). In test mode this signal is used as test clock
input
21
P35
IO
DVDD
General purpose IO signal
22
P34
IO
SVDD
General purpose IO signal or clk signal for the SAM
23
SIGOUT
O
SVDD
Contactless communication interface output: delivers a serial data stream
according to NFCIP-1 and output signal for the SAM. In test mode this
signal is used as test signal output.
24
SIGIN
I
SVDD
Contactless communication interface input: accepts a digital, serial data
stream according to NFCIP-1 and input signal from the SAM. In test mode
8