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參數(shù)資料
| 型號： | PPC405CR-3BC200CZ |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PowerPC 405CR Embedded Processor |
| 中文描述： | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA316 |
| 封裝： | 27 X 27 MM, PLASTIC, EBGA-316 |
| 文件頁數(shù)： | 27/42頁 |
| 文件大?。?/td> | 446K |
| 代理商： | PPC405CR-3BC200CZ |
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PPC405CR – PowerPC 405CR Embedded Processor
Revision 1.02 – January 11, 2005
Data Sheet
AMCC
27
GPIO1[TS1E]
GPIO2[TS2E]
General Purpose I/O
or
Even Trace execution status. To access this function, software must
toggle a DCR register bit.
I/O[O]
5V tolerant
3.3V LVTTL
1, 6
GPIO3[TS1O]
GPIO4[TS2O]
General Purpose I/O
or
Odd Trace execution status. To access this function, software must
toggle a DCR register bit.
I/O[O]
5V tolerant
3.3V LVTTL
1, 6
GPIO5:8[TS3:6]
General Purpose I/O
Trace status. To access this function, software must toggle a DCR
register bit.
I/O[O]
5V tolerant
3.3V LVTTL
1
GPIO9[TrcClk]
General Purpose I/O
or
Trace interface clock. A toggling signal that is always half of the CPU
core frequency. To access this function, software must toggle a DCR
register bit.
I/O[O]
5V tolerant
3.3V LVTTL
1
TestEn
Test Enable.
I
2.5V CMOS
w/pull-down
RcvrInh
Receiver Inhibit. Used only for manufacturing tests. Pull up for normal
operation.
I
5V tolerant
3.3V LVTTL
2
DrvrInh1:2
Driver Inhibit 1 and 2. Used only for manufacturing tests. Pull up for
normal operation.
I
5V tolerant
3.3V LVTTL
2
TmrClk
An external clock input than can be used as an alternative to SysClk
to run the CPU core. Which clock input is used is determined by
software settings.
I
5V tolerant
3.3V LVTTL
1
Power
GND
Ground
Note:
Pins J9–J12, K9–K12, L9–L12, and M9–M12 are also thermal
balls.
AV
DD
Filtered voltage input for PLL (analog) circuits
OV
DD
Output driver voltage—3.3V
V
DD
Logic voltage—2.5V
Other pins
Reserved
Connect G19 to GND. Do not connect signals, voltage, or ground to
any other reserved pins.
Table 6. Signal Functional Description (Sheet 5 of 5)
Multiplexed signals are shown in brackets following the first signal name assigned to each multiplexed ball.
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 21 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 21 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull-up or pull-down required.
7. Pull-up may be required. See “External Bus Control Signals” on page 22.
Signal Name
Description
I/O
Type
Notes
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PPC405CR-3BC266C | PowerPC 405CR Embedded Processor |
| PPC405CR-3BC266CZ | PowerPC 405CR Embedded Processor |
| PPC405CR-3KC133C | PowerPC 405CR Embedded Processor |
| PPC405CR-3KC133CZ | PowerPC 405CR Embedded Processor |
| PPC405CR-3KC200C | PowerPC 405CR Embedded Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PPC405CR-3BC266C | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PowerPC 405CR Embedded Processor |
| PPC405CR-3BC266CZ | 制造商:AppliedMicro 功能描述:MPU 405CR RISC 32BIT 0.25UM 266MHZ 3.3V 316PIN EBGA - Tape and Reel |
| PPC405CR-3KC133C | 制造商:AppliedMicro 功能描述:MPU 405CR RISC 32-Bit 0.25um 133MHz 3.3V 316-Pin EBGA Tray |
| PPC405CR-3KC133CZ | 制造商:AppliedMicro 功能描述:MPU 405CR RISC 32-Bit 0.25um 133MHz 3.3V 316-Pin EBGA T/R 制造商:AppliedMicro 功能描述:MPU 405CR RISC 32BIT 0.25UM 133MHZ 3.3V 316PIN EBGA - Tape and Reel |
| PPC405CR-3KC200C | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PowerPC 405CR Embedded Processor |
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