參數(shù)資料
型號: PPC440SP
廠商: Applied Micro Circuits Corp.
英文描述: PowerPC 440SP Embedded Processor
中文描述: 嵌入式處理器的PowerPC 440SP
文件頁數(shù): 54/85頁
文件大小: 615K
代理商: PPC440SP
PowerPC 440SP Embedded Processor
54
AMCC Proprietary
Revision 1.23 - Sept 26, 2006
Data Sheet
Signal Description
The PPC440SP embedded controller is packaged in a 783-ball flip-chip plastic ball grid array (FC-PBGA). The
following table describes the package level pinout.
In the table “Signal Functional Description” on page 56, each I/O signal is listed along with a short description of its
function. Active-low signals (for example, RAS) are marked with an overline. Please see “Signals Listed
Alphabetically” on page 17 for the pin (ball) number to which each signal is assigned.
Table 5. Pin Summary
Group
No. of Pins
Signal pins, non-multiplexed
496
Signal pins, multiplexed
32
Total Signal Pins
528
AxV
DD
2
APxV
DD
3
AxGND
5
OV
DD
(3.3V I/Os)
15
PxV
DD
(3.3V-1.5V PCI)
31
SV
DD
G(2.5-1.8V SDRAM)
10
V
DD
(1.5V Logic)
47
GND
92
Total Power Pins
205
Reserved
50
Total Pins
783
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