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參數(shù)資料
| 型號： | PS2500 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | Low-Power Direct Digital Modulation Frequency Synthesizer |
| 中文描述： | 低功耗直接數(shù)字調(diào)制頻率合成器 |
| 文件頁數(shù)： | 7/28頁 |
| 文件大?。?/td> | 184K |
| 代理商： | PS2500 |
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PS2500 2.2 GHz Fractional-N Frequency Synthesizer
- 7 -
Philsar Semiconductor Inc.
146 Colonnade Road S.
Nepean, Ontario, Canada
K2E 7Y1
Tel: 613-274-0922
Fax: 613-274-0915
www.philsar.com
PMP-001-DS2 V1.2
Note:
Because of the high fractionality of the PS2500, there is no practical need for any integer
relationship between the reference frequency and the channel spacing or desired VCO frequencies.
Fractional-N Example
Case 1:
To achieve a desired frequency
F
VCO_main
of 902.4530 MHz using crystal frequency of 40 MHz
with operation of the synthesizer in 18-bit mode.
Since the maximum internal reference frequency
F
div_ref
is 25 MHz, the crystal frequency is divided by 2
to obtain a
F
div_ref
of 20 MHz
1
. Therefore, using:
N
fractional
= F
VCO
/ F
div_ref
= 902.4530 / 20
= 45.12265
The value to be programmed in the
Main Divider Register
is:
Nreg = Round [Nfractional] - 32
= Round[45.12265] - 32
= 74 - 32
= 13
= 0 0000 1101(binary)
With the modulator in 18-bit mode, the value to be programmed in the
Main Dividend Registers
is:
dividend
= Round (divider x (N
fractional
- N
reg
- 32))
= Round (262144 x (45.12265 - 13 - 32))
= Round (262144 x (0.12265))
= Round (32151.9616)
= 32152 (decimal)
= 00 0111 1101 1001 1000 (binary)
Where
00 0111 1101
is loaded in the
Main Dividend MSB Register
and
1001 1000
is loaded in the
Main
Dividend LSB Register
.
Summarizing,
Main Divider Register = 0 0000 1101
Main Dividend LSB Register = 1001 1000
Main Dividend MSB Register
= 00 0111 1101
1.
The frequency step size for this case is 20 MHz divided by 2
18
giving 76.3 Hz.
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