參數(shù)資料
型號(hào)： PSD301R
英文描述： Field Programmable Microcontroller Peripherals(可編程邏輯,無SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入)
中文描述： 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備（可編程邏輯，無的SRAM，19余個(gè)可編程輸入/輸出，通用PLD的有12個(gè)輸入）
文件頁數(shù)： 24/127頁
文件大小： 682K
代理商： PSD301R
PSD3XX Famly
2-24
Control Signals
The PSD3XX control signals are WR/V
PP
or R/W, RD/E or RD/E/DS, ALE or AS,
BHE/PSEN or PSEN, RESET, and A19/CSI. Each of these signals can be configured to
meet the output control signal requirements of various microcontrollers.
WR/V
PP
or R/W
In operational mode, this signal can be configured as WR or R/W. As WR, all write
operations are activated by an active low signal on this pin. As R/W, the pin operates with
the E strobe of the RD/E/DS or RD/E pin. When R/W is high, an active high signal on the
RD/E/DS or RD/E pin performs a read operation. When R/W is low, an active high signal on
the RD/E/DS or RD/E pin performs a write operation.
RD/E/DS (or RD/E on PSD3X1)
In operational mode, this signal can be configured as RD, E, or DS. As RD, all read
operations are activated by an active low signal on this pin. As E, the pin operates with the
R/W signal of the WR/V
PP
or R/W pin. When R/W is high, an active high signal on the
RD/E/DS pin performs a read operation. When R/W is low, an active high signal on the
RD/E/DS pin performs a write operation.
As DS, the pin functions with the R/W signal as an active low data strobe signal. As DS, the
R/W defines the mode of operation (Read or Write).
ALE or AS
ALE polarity is programmable. When programmed to be active high, a high on the pin
causes the input address latches, Port A address latches, Port C, and A19 address latches
to be transparent. The falling edge of ALE locks the information into the latches. When ALE
is programmed to be active low, a low on the pin causes the input address latches, Port A
address latches, Port C, and A19 address latches to be transparent. The rising edge of ALE
locks the appropriate information into the latches.
BHE/PSEN
This pin’s function depends on the PSD3XX data bus width. If it is 8 bits, the pin is PSEN; if
it is 16 bits, the pin is BHE. In 8-bit mode, the PSEN function enables the user to work with
two address spaces: program memory and data memory (if COMB/SEP = 1). In this mode,
an active low signal on the PSEN pin causes the EPROM to be read if selected. The SRAM
and I/O ports read operation are done by RD low (CRRWR = 0), or by E high and R/W high
(CRRWR = 1, CEDS = 0) or by DS low and R/W high (CRRWR, CEDS = 1).
Whenever a member of the 8031 family (or any other similar microcontroller) is used, the
PSEN pin must be connected to the PSEN pin of the microcontroller.
If COMB/SEP = 0, the address spaces of the program and the data are combined. In this
configuration (except for the 8031-type case mentioned above), the PSEN pin must be tied
high to V
CC
, and the EPROM, SRAM, and I/O ports are read by RD low (CRRWR = 0), or
by E high and R/W high (CRRWR = 1, CEDS = 0) or by DS low and R/W high (CRRWR,
CEDS = 1). See Figures 9 and 10.
In BHE mode, this pin enables accessing of the upper-half byte of the data bus. A low on
this pin enables a write or read operation to be performed on the upper half of the data bus
(see Table 9).
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