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參數(shù)資料
| 型號(hào)： | PSD311L |
| 英文描述： | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入) |
| 中文描述： | 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備（可編程邏輯，16K的位的SRAM，19余個(gè)可編程輸入/輸出，通用PLD的有12個(gè)輸入） |
| 文件頁數(shù)： | 17/18頁 |
| 文件大小： | 179K |
| 代理商： | PSD311L |
PSD3XX – Application Note 020
1-189
PSD3XX
Solution
for 16-Bit
Microcontroller
with Non-
Multiplexed
Bus
Figure 6 shows one half of the address map table and the address decode equations for the
EPROM, SRAM and I/O ports of the odd bank PSD3XX. Notice that A19, A17 and A16 are
the input signals UDS, CS0 and CS1. Since this is the decoding for the odd bank, UDS
(A19) has to be low for any of the PSD3XX devices to be enabled.
Furthermore, the CS0 selects the EPROM and CS1 selects SRAM and I/O Port. The chip
select logic of the 68302 also generates the programmed amount of wait state internally.
The signals A15, A14 and A13 in the address map are actually A16, A15 and A14 after
the input address lines to the PSD3XX are shifted by one. Entries to the FILE ADDRESS
START/STOP columns must also change to reflect the shift of the address lines.
Figure 6. Address Map, Odd Bank PSD3XX
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| PSD311 | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入) |
| PSD312-15IB | Field-Programmable Peripheral |
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相關(guān)代理商/技術(shù)參數(shù) |
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| PSD311L-15J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD311L-15JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD311L-15LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD311L-15LM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD311L-15U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
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