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      1. 參數(shù)資料
        型號: PSD411A2
        廠商: 意法半導(dǎo)體
        英文描述: Low Cost Field Programmable Microcontroller Peripherals
        中文描述: 低成本現(xiàn)場可編程微控制器外圍設(shè)備
        文件頁數(shù): 27/123頁
        文件大?。?/td> 657K
        代理商: PSD411A2
        Signal Name
        From
        PA0 – PA7
        Port A inputs or Macrocell PA feedback
        PB0 – PB7
        Port B inputs or Macrocell PB feedback
        PE0 – PE7
        Port E inputs or Macrocell PE feedback
        PC0 – PC7
        Port C inputs
        PD0 – PD7
        Port D inputs
        PGR0 – PGR3
        Page Mode Register
        A8 – A15, A0, A1
        MCU Address Lines
        RD/E/DS
        MCU bus signal
        WR/R_W
        MCU bus signal
        CLKIN
        Input Clock
        RESET
        Reset input
        CSI
        CSI input (ORed with power down from PMU)
        PSD4XX Famly
        24
        Table 4. ZPLDInput Signals
        The PSD4XX
        Architecture
        (cont.)
        9.1.2.1 The DPLD
        The DPLD is used for internal address decoding generating the following eight chip select
        signals:
        J
        ES0 – ES3
        EPROM selects, block 0 to block 3
        J
        RS0
        SRAM block select
        J
        CSIOP
        I/O Decoder chip select
        J
        PSEL0 – PSEL1
        Peripheral I/O mode select signals
        The I/O Decoder enabled by the CSIOP generates chip selects for on-chip registers or I/O
        ports based on address inputs A[7:0].
        As shown in Figure 12, the DPLD consists of a large programmable AND ARRAY. There
        are a total of 59 inputs and 8 outputs. Each output consists of a single product term.
        Although the user can generate select signals from any of the inputs, the select signals are
        typically a function of the address and Page Register inputs. The select signals are defined
        by the user in the ABEL file (PSDabel).
        The address line inputs to the DPLD include A0, A1 and A8 – A15. If more address lines
        are needed, the user can bring in the lines through Port A to the DPLD.
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        PSD413A2 Low Cost Field Programmable Microcontroller Peripherals
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        相關(guān)代理商/技術(shù)參數(shù)
        參數(shù)描述
        PSD411A2-12J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
        PSD411A2-12JI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
        PSD411A2-12LI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
        PSD411A2-12U 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
        PSD411A2-12UI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral