參數(shù)資料
型號(hào): PSD413F
英文描述: Field Programmable Microcontroller Peripherals with Flash Memory(可編程邏輯,16K位SRAM,35個(gè)可編程I/O,通用PLD有59個(gè)輸入)
中文描述: 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備與快閃記憶體(可編程邏輯,16K的位的SRAM,35余個(gè)可編程輸入/輸出,通用PLD的有59個(gè)輸入)
文件頁(yè)數(shù): 86/98頁(yè)
文件大小: 365K
代理商: PSD413F
PSD413F Family
6-86
ADVANCE INFORMATION
Command
Definitions
Bus
Write
Cycles
Req’d
Fourth Bus
Read/Write
Cycle
Command
Sequence
First Bus
Write Cycle
Second Bus
Write Cycle
Third Bus
Write Cycle
Fifth Bus
Write Cycle
Sixth Bus
Write Cycle
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Reset/Read
3
5555H
AAH
2AAAH
55H
5555H
F0H
RA
RD
Autoselect
3
5555H
AAH
2AAAH
55H
5555H
90H
XX00H/
XX01H
01H/20H
Byte Program
4
5555H
AAH
2AAAH
55H
5555H
A0H
PA
PD
Chip Erase
6
5555H
AAH
2AAAH
55H
5555H
80H
5555H
AAH
2AAAH
55H
5555H
10H
Sector Erase
6
5555H
AAH
2AAAH
55H
5555H
80H
5555H
AAH
2AAAH
55H
SA
30H
Table 3. Flash Memory Command Definitions
(Notes 1 – 5)
Device operations are selected by writing specific address and data sequences into the
command register. Writing incorrect address and data values or writing them in the
improper sequence will reset the device to the read mode. Table 3 defines the valid register
command sequences.
NOTES:
1. RA = Address of the memory location to be read.
2. PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of the WRF pulse.
SA = Address of the sector to be erased. The combination of A16F, A15F, and A14 will uniquely select any sector.
3. RD = Data read from location RA during read operation.
PD = Data to be programmed at location PA. Data is latched on the rising edge of WRF.
4. Address bit A15F = X, X = Don’t Care.
5. Address bit A16F = X, X = Don’t Care for all address commands except for Program Address (PA) and Sector Address (SA).
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