參數(shù)資料
型號(hào): PSD813F2A
廠商: 意法半導(dǎo)體
英文描述: Flash In-System Programmable(ISP) Peripherals For 8-bit MCUs(用于八位MCU的閃速在系統(tǒng)可編程外圍芯片)
中文描述: Flash在系統(tǒng)可編程(ISP)為周邊8位微控制器(用于八位微控制器的閃速在系統(tǒng)可編程外圍芯片)
文件頁(yè)數(shù): 55/103頁(yè)
文件大?。?/td> 1180K
代理商: PSD813F2A
55/103
PSD8XXF2/3/4/5
Port C – Functionality and Structure
Port C can be configured to perform one or more
of the following functions (see Figure 26):
I
MCU I/O Mode
I
CPLD Output – McellBC7-McellBC0 outputs
can be connected to Port B or Port C.
I
CPLD Input – via the Input Macrocells (IMC)
I
Address In – Additional high address inputs
using the Input Macrocells (IMC).
I
In-System Programming (ISP) – JTAG port can
be enabled for programming/erase of the
PSD8XXFX device. (See the section entitled
“PROGRAMMING IN-CIRCUIT USING THE
JTAG SERIAL INTERFACE”, on page 65, for
more information on JTAG programming.)
I
Open Drain – Port C pins can be configured in
Open Drain Mode
I
Battery Backup features – PC2 can be
configured for a battery input supply, Voltage
Stand-by (V
STBY
).
PC4 can be configured as a Battery-on Indicator
(VBATON), indicating when V
CC
is less than
V
BAT
.
Port C does not support Address Out mode, and
therefore no Control Register is required.
Pin PC7 may be configured as the DBE input in
certain MCU bus interfaces.
Figure 26. Port C Structure
I
DATA OUT
REG.
D
Q
D
Q
WR
WR
MCELLBC[7:0]
ENABLE PRODUCT TERM (.OE)
READ MUX
P
D
B
CPLD-INPUT
DIR REG.
INPUT
MACROCELL
ENABLE OUT
SPECIAL FUNCTION1
SPECIAL FUNCTION1
CONFIGURATION
BIT
DATA IN
OUTPUT
SELECT
OUTPUT
MUX
PORT C PIN
DATA OUT
AI02888B
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PSD813F2A-12JT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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