參數(shù)資料
        型號: PSD835G2
        英文描述: 100V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-254AA Tabless package; Similar to IRHMJ57160 with optional Total Dose Rating of 1000kRads
        中文描述: 可配置的存儲系統(tǒng)級芯片的8位微控制器
        文件頁數(shù): 57/110頁
        文件大?。?/td> 570K
        代理商: PSD835G2
        PSD8XX Family
        PSD835G2
        56
        The
        PSD835G2
        Functional
        Blocks
        (cont.)
        MCU
        Port E (3:0)
        Port E (7:4)
        Port F (3:0)
        Port F (7:4)
        Port G (3:0)
        Port G (7:4)
        80C51XA
        N/A
        *
        Addr (7:4)
        N/A
        *
        Addr (7:4)
        Addr (11:8)
        N/A
        80C251
        (Page Mode)
        N/A
        N/A
        N/A
        N/A
        Addr (11:8)
        Addr (15:12)
        All Other
        Eight-Bit
        Multiplexed
        Addr (3:0)
        Addr (7:4)
        Addr (3:0)
        Addr (7:4)
        Addr (3:0)
        Addr (7:4)
        8-Bit
        Non-Mux
        Bus
        N/A
        N/A
        N/A
        N/A
        Addr (3:0)
        Addr (7:4)
        Table 18. I/OPort Latched Address Output Assignments
        9.4.2.4 Address In Mode
        For microcontrollers that have more than 16 address lines, the higher addresses can be
        connected to Ports A, B, C, D or F and are routed as inputs to the PLDs. The address
        input can be latched in the Input Micro
        Cell by the address strobe (ALE/AS). Any
        input that is included in the DPLD equations for the Main Flash, Boot Flash, or SRAM is
        considered to be an address input.
        9.4.2.5 Data Port Mode
        Port F can be used as a data bus port for a microcontroller with a non-multiplexed
        address/data bus. The Data Port is connected to the data bus of the microcontroller. The
        general I/O functions are disabled in Port F if the ports are configured as Data Port. Data
        Port Mode is automatically configured in PSDsoft when a non-multiplexed bus MCU is
        selected.
        9.4.2.6 Peripheral I/OMode
        Peripheral I/O Mode can be used to interface with external 8-bit peripherals. In this mode,
        all of Port F serves as a tri-stateable, bi-directional data buffer for the microcontroller.
        Peripheral I/O Mode is enabled by setting Bit 7 of the VM Register to a ‘1’. Figure 25
        shows how Port A acts as a bi-directional buffer for the microcontroller data bus if
        Peripheral I/O Mode is enabled. An equation for PSEL0 and/or PSEL1 must be specified in
        PSDsoft. The buffer is tri-stated when PSEL 0 or 1 is not active.
        9.4.2.7 JTAG ISP
        Port E is JTAG compliant, and can be used for In-System Programming (ISP). You can
        multiplex JTAG operations with other functions on Port E because ISP is not performed
        during normal system operation. For more information on the JTAG Port, refer to
        section 9.6.
        9.4.2.3 Address Out Mode
        For microcontrollers with a multiplexed address/data bus, Address Out Mode can be used
        to drive latched addresses onto the port pins. These port pins can, in turn, drive external
        devices. Either the output enable or the corresponding bits of both the Direction Register
        and Control Register must be set to a ‘1’ for pins to use Address Out Mode. This must be
        done by the MCU at run-time. See Table 18 for the address output pin assignments on
        Ports E, F and F for various MCUs.
        Note:
        Do not drive address lines with Address Out Mode to an external memory device if
        it is intended for the MCU to boot from the external device. The MCU must first boot from
        PSD memory so the Direction and Control register bits can be set.
        相關(guān)PDF資料
        PDF描述
        PSD835G2V 150V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package. Also available with 300 kRads Total Dose Rating.; Similar to IRHNA67164 with optional Total Dose Rating of 300 kRads.
        PSD835G2-B-12B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
        PSD835F2-B-12B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
        PSD835G2-C-12B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
        PSD835F2-C-12B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
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