參數(shù)資料
型號： PSF21911
廠商： SIEMENS A G
元件分類： 數(shù)字傳輸電路
英文描述： ISDN Echocancellation Circuit for Terminal Applications IEC-Q TE
中文描述： DATACOM, ISDN ECHO CANCELLER
文件頁數(shù)： 82/164頁
文件大?。?/td> 1401K
代理商： PSF21911
PSB 21911
PSF 21911
Access to IOM-2 Channels
Semiconductor Group
82
11.97
2.6.1
B-Channel Access
Setting SWST:B1 (B2) to "1" enables the microprocessor to access B1 (B2)-channel
data between IOM-2 and the U-transceiver.
Eight registers (see
table 16
) handle the transfer of data from IOM-2 to the μP, from the
μP to IOM-2, from the μP to U and from U to the μP:
Every time B-channel bytes arrive, an interrupt ISTA:B1 or ISTA:B2 respectively is
created. It is cleared after the corresponding registers have been read. ISTA:B1 is
cleared after RB1U and RB1I have been read. ISTA:B2 is cleared after RB2I and RB2U
have been read. After an interrupt the data in RB1U and RB1I is stable for 125μs.
2.6.2
Setting SWST:D to "1" enables the microprocessor to access D-channel data between
the IOM-2 and the U-interface.
D-Channel Access
Four registers (see
table
17
) handle the transfer of data from IOM-2 to the μP, from the
μP to IOM-2, from the μP to U and from U to the μP.
Two 2-bit FIFOs of length 4 collect the incoming D-channel packets from IOM and U.
Every fourth IOM-frame they are full, an interrupt ISTA:D is generated and the contents
Table 16
Register
WB1U
RB1U
WB1I
RB1I
WB2U
RB2U
WB2I
RB2I
B1/B2-Channel Data Registers
Function
write B1-channel data to U-interface
read B1-channel data from U-interface
write B1-channel data to IOM-2
read B1-channel data from IOM-2
write B2-channel data to U-interface
read B2-channel data from U-interface
write B2-channel data to IOM-2
read B2-channel data from IOM-2
Table 17
Register
DWU
DRU
DWI
DRI
D-channel data registers
Function
write D-channel data to U-interface
read D-channel data from U-interface
write D-channel data to IOM-2
read D-channel data from IOM-2
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PDF描述
PSB21911 ISDN Echocancellation Circuit for Terminal Applications IEC-Q TE
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