- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368349 > PT7A8980 100V Quad N-Channel HEXFET Power MOSFET in a Power MLP package PDF資料下載
參數(shù)資料
| 型號(hào)： | PT7A8980 |
| 英文描述： | 100V Quad N-Channel HEXFET Power MOSFET in a Power MLP package |
| 中文描述： | 256端口無阻塞時(shí)隙開關(guān)？ |技術(shù)資料？（PDF格式） |
| 文件頁(yè)數(shù)： | 6/19頁(yè) |
| 文件大?。?/td> | 220K |
| 代理商： | PT7A8980 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)當(dāng)前第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)
6
PT0011(09/02)
Ver:3
Data Sheet
PT7A8980/8980L Digital Switch
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Functional Description
ST-BUS (Serial Telecom Bus) is widely used in bus architec-
ture. It supports digital voice, data switching and inter-proces-
sor communication within the Telecommunication Switch or
Access System. The ST-BUS data stream has a bit rate of 2048
kbit/s. It
’
s organized in frames of 125
μ
s. Each frame contains
32 channels, and each channel contains one byte of serial
data.
The PT7A8980/8980L is designed to handle data in the ST-
BUS format. It combines data switching function and inter-
processor communication function into one device. There-
fore, it
’
s suitable for use in distributed processing systems to
switch digitized voice or data in ST-BUS format.
The PT7A8980/8980L can perform the data switching between
channels on ST-BUS input and channels on ST-BUS output.
The microprocessor can read the data from any ST-BUS input
channel or write the data to any ST-BUS output channel via
the microprocessor interface . The microprocessor communi-
cates with the PT7A8980/8980L in the same way as with its
external memory. By writing to the PT7A8980/8980L, the mi-
croprocessor can either establish switched connections be-
tween one ST-BUS input channel and one ST-BUS output chan-
nel or transmit specific messages to ST-BUS output channels.
On the other hand, by reading from the PT7A8980/8980L, the
microprocessor can receive messages from ST-BUS input chan-
nel or check which switching connections have been already
established.
Input and Output Control
2048 kbit/s ST-BUS data goes to the chip through 8 ST-BUS
inputs (STi0-STi7) of the PT7A8980/8980L. Each ST-BUS
input data stream contains 32 channels, each channel contains
8 bits. After entering into the chip, the 8 bit data is converted
into parallel form, and is stored in one of the 256 x 8 Voice or
Data Memory locations. Each byte location in the Data Memory
is associated with a channel on one of the 8 ST-BUS input data
streams.
Similarly, each location of 256 x 11 Connection Memory is
also associated with a channel on one of the ST-BUS output
data streams . The Connection Memory is divided into two
parts, high and low. In each memory location, the high part
contains 3 bits, the low part contains 8 bits. When a data is due
to be transmitted to a ST-BUS output, the data of the channel
can either be switched from a ST-BUS input channel or can
originate from the microprocessor. If the data is switched from
an channel, the contents of the Connection Memory Low Lo-
cation associated with the output channel will be used to ad-
dress the Data Memory. Since this Data Memory address corre-
sponds to a specific channel on a ST-BUS input stream, the
data from this input channel is switched to be put out to the
proper output channel. If the data to an output channel origi-
nates from the microprocessor (Message Mode), the contents
of the Connection Memory Low Location associated with the
output channel are output directly, and this data is output
repetitively on the channel every frame until the microproces-
sor intervenes.
Microprocessor Interface and Address Selection
The Microprocessor Interface consists of data lines D7-D0,
address lines A5-A0 and control signals CS, DTA . The micro-
processor can access the Control Register as well as the memory
inside the chip via the Microprocessor Interface. There are two
parts of any address of the Data Memory and Connection
Memory. The higher 3 bits come from the Control Register,
and the lower 5 bits come from the address lines directly.
A5
A4
A3
A2
A1
A0
e
H x
s
d
A
n
o
o
L
0
x
x
x
x
x
F
1
0
l
o
C
*
e
R
1
0
0
0
0
0
0
2
*
*
0
l
n
n
a
h
C
1
0
0
0
0
1
1
2
*
*
1
l
n
n
a
h
C
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
1
1
1
1
1
1
F
3
*
*
1
3
l
n
n
a
h
C
.
s
o
e
o
c
e
h
a
y
b
y
o
e
h
e
R
e
m
a
.
e
R
l
o
C
a
D
d
n
a
l
o
C
e
h
o
g
y
m
e
M
e
h
n
W
*
*
f
*
d
e
p
Table 3. Address Memory Map
As shown in Table 3 above, whether the processor access the
Control Register or the internal memory depends on the status
of address line A5. If A5 is 0, the Control Register is addressed
regardless of the value of the other address lines. If A5 is 1, the
internal memory is addressed. In this case, the contents of the
Control Register bits 4~3 determine whether Connection
Memory High or Low or Data Memory is accessed. The Con-
trol Register bits 2~0 select the memory address associated
with the particular data stream, while address lines A4~A0 se-
lect the memory location corresponding to the channel of this
data stream.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PT7C4337 | Real-time Clock Module (I2C Bus) |
| PT7C4337PE | Real-time Clock Module (I2C Bus) |
| PT7C4337UE | Real-time Clock Module (I2C Bus) |
| PT7C4337WE | Real-time Clock Module (I2C Bus) |
| PT7C4501 | Frequency Multiplier? |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PT7B | 制造商:Mallory Sonalert Products Inc 功能描述: |
| PT7B4 | 功能描述:密封鉛酸電池 12V MOTORCYCLE BATTERY RoHS:否 制造商:CSB 輸出電壓:12 V 容量: 大小: 端接類型:Faston Tab |
| PT7C4050 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:PLL with Integrated VCXO |
| PT7C4050ADE | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:PLL with Integrated VCXO |
| PT7C4050ALE | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:PLL with Integrated VCXO |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。