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參數(shù)資料
| 型號： | PT8146L |
| 廠商： | Princeton Technology Corporation |
| 英文描述： | 8-Bit 12-Ch I/O DAC |
| 中文描述： | 8位12通道的I / O援 |
| 文件頁數(shù)： | 4/27頁 |
| 文件大?。?/td> | 367K |
| 代理商： | PT8146L |
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Tel: 886-2-66296288
PIN DESCRIPTION
Pin Name
Description
D/A converter analog output pins (VDD to GND output).
(Default: output #00 setting level)
These pins may be used as either I/O expander parallel input/output
(VCCA/GND output 0.5 VCCA/0.2 VCCA input) or as D/A converter analog
output (VDD to GND output).
Pin status is controlled by input data.
See “Data Configuration”. (Default: Input mode, Hi-Z state)
VDD*1
D/A converter reference power pin.
VCCD*1
MCU interface power supply pin (power supply for I/O expander)
I/O expander parallel input/output pins.
(VCCD/GND output: When VCCD
≥
4.0 V, 0.5 VCCD/0.2 VCCD input,
When VCCD < 4.0 V, 2 V/0.2 VCCD input)
Pin status is controlled by input data
See “Data Configuration.” (Default: Input mode, Hi-Z state)
Shift clock signal input pin.
When CS = “L”, SI data is loaded into the shift register at the rising edge of
the shift clock.
Data input pin (serial input pin).
Used for 16-bit serial data input.
Data output pin (serial output pin).
The first bit (LSB) data of the 16-bit shift register is output simultaneously
with the falling edge of the shift clock.
When /CS output = “H”, this pin goes to high impedance state.
Chip select signal input pin.
Input to shift registers is enabled when the/ CS signal falling edges. Shift
register contents can be executed when the /CS signal rising edges.
VCCA*1
Analog unit power supply pin (OP amplifier power supply).
GND
Common GND pin
*1: Be sure that VCCA
≥
VCCD, and that VCCA
≥
VDD.
*2: Do not leave this pin in floating state.
URL: http://www.princeton.com.tw
Fax: 886-2-29174598
PT8146 V1.1
- 4 -
February, 2006
8-Bit 12-Ch I/O DAC
PT8146
Pin No.
1 to 4
AO1 to AO4
D11/AO5 to
D4/AO12
5 to 12
13
14
D3 to D0
15 to 18
CLK*2
19
SI*2
20
SO
21
/CS*2
22
23
24
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