參數(shù)資料
型號: PTH12060LAHT
廠商: Texas Instruments, Inc.
英文描述: 10-A, 12-V INPUT NON-ISOLATED WIDE-OUTPUT ADJUST POWER MODULE
中文描述: 10甲,12 V輸入非隔離寬輸出調(diào)節(jié)電源模塊
文件頁數(shù): 4/29頁
文件大?。?/td> 1028K
代理商: PTH12060LAHT
www.ti.com
ELECTRICAL CHARACTERISTICS
T
A
= 25°C; V
I
= 12 V; V
O
= 3.3 V; C
I
= 560 μF, C
O
= 0 μF, and I
O
= I
O
max (unless otherwise stated)
PTH12060W/L
SLTS217D–MAY 2003–REVISED OCTOBER 2005
PTH12060W
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
T
A
= 60
°
C, 200 LFM airflow
0
10
(1)
A
I
O
Output current
Over
V
adj
range
T
A
= 25
°
C, natural convection
10
(1)
A
V
I
Input voltage range
Over I
O
range
10.8
13.2
V
V
O tol
Set-point voltage tolerance
±
2
(2)
%V
O
Reg
temp
Temperature variation
–40
°
C < T
A
< 85
°
C
±
0.5
%V
O
Reg
line
Line regulation
Over V
in
range
±
10
mV
Reg
load
Load regulation
Over I
o
range
±
12
mV
Reg
tot
Total output variation
Includes set-point, line, load, –40
°
C
T
A
85
°
C
±
3
%V
O
V
adj
Output voltage adjust range
Over V
in
range
1.2
5.5
V
R
SET
= 280
, V
O
= 5.0 V
94%
R
SET
= 2.0 k
, V
O
= 3.3 V
92%
R
SET
= 4.32 k
, V
O
= 2.5 V
90%
η
Efficiency
I
O
= 8 A
R
SET
= 11.5 k
, V
O
= 1.8 V
87%
R
SET
= 24.3 k
, V
O
= 1.5 V
85%
R
SET
= open circuit, V
O
= 1.2 V
83%
V
O
2.5 V
25
(3)
mV
PP
20-MHz bandwidth,
with C
O
2 = 10 μF ceramic
V
O
ripple (peak-to-peak)
V
O
> 2.5 V
1
(3)
%V
O
I
O
trip
Overcurrent threshold
Reset, followed by auto-recovery
20
A
t
tr
1 A/μs load step, 50 to
100% I
max,
C
O
1 = 330 μF
Recovery time
70
μS
Transient response
V
o
over/undershoot
100
mV
V
tr
V
O
adj
Margin up/down adjust
±
5%
I
IL
margin
Margin input current (pins 9/10)
Pin to GND
–8
(4)
μ
A
I
IL
track
Track input current (pin 8)
Pin to GND
–0.11
(5)
mA
dV
track
/dt
Track slew rate capability
C
O
C
O
(max)
1
V/ms
V
I
increasing
9.5
10.4
UVLO
Undervoltage lockout
V
V
I
decreasing
8.8
9
Inhibit Control (pin 3)
Referenced to GND
V
IH
Input high voltage
V
I
– 0.5
Open
(5)
V
V
IL
Input low voltage
–0.2
0.5
I
IL
inhibit
Input low current
Pin to GND
0.24
mA
I
I
inhibit
Input standby current
Inhibit (pin 3) to GND, Track (pin 8) open
10
mA
f
s
Switching frequency
Over V
I
and I
O
ranges
300
350
400
kHz
C
I
External input capacitance
560
(6)
μF
Nonceramic
0
330
(7)
5500
(8)
Capacitance value
μF
C
O
External output capacitance
Ceramic
0
300
Equivalent series resistance (nonceramic)
4
(9)
m
6.4
MTBF
Reliability
Per Bellcore TR-332, 50% stress, T
A
= 40
°
C, ground benign
10
6
Hr
(1)
(2)
See SOA curves or consult factory for appropriate derating.
The set-point voltage tolerance is affected by the tolerance and stability of R
SET
. The stated limit is unconditionally met if R
SET
has a
tolerance of 1% with 100 ppm/
°
C or better temperature stability.
The peak-to-peak output ripple voltage is measured with an external 10-μF ceramic capacitor. See the standard application schematic.
A small, low leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.
This control pin has an internal pull-up to the input voltage V
(7.5 V for pin 8). If it is left open-circuit, the module operates when input
power is applied. A small, low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control.
For further information, see the related application information section.
A 560 μF input capacitor are required for proper operation. The electrolytic capacitor must be rated for a minimum of 1050 mA rms of
ripple current.
An external output capacitor is not required for basic operation. Adding 330 μF of distributed capacitance at the load improves the
transient response.
This is the calculated maximum. The minimum ESR limitation oftens result in a lower value. When controlling the Track pin using a
voltage supervisor, C
(max) is reduced to 2200
μ
F. See the application notes for further guidance.
This is the typical ESR for all the electrolytic (nonceramic) output capacitance. Use 7 m
as the minimum when using max-ESR values
to calculate.
(3)
(4)
(5)
(6)
(7)
(8)
(9)
4
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