
IWE8, V3.4
PXB 4219E, PXB 4220E, PXB 4221E
Operational Description
Data Sheet
50
2003-01-20
Figure 11
Pre-assigned cell header values at the UNI (Table 1/I.361)
In contrast to this the ATM-Forum recommends in the User-network interface
specification that the receiving ATM entity is responsible for extraction and discarding of
unassigned and idle cells.
Figure 12
Pre-defined header field values [11]
The RX Idle/Unassigned Cell Control Register (rxid, see
Chapter 7.9
) can be used in
order to achieve ITU-T or ATM-Forum compliance.
The 4 MSBs of header octet 1 and the 4 LSBs of header octet 4 of the received cells to
be discarded are programmable in bits “prg_rx_hd”. All other header bits must be 0. On
top the “msk_rx_hd” field of “rxid” allows to mask all or some of these bits. The masked
bits are considered as “don’t care”.
If ITU-T I.361 compliance is desired, the “prg_rx_hd” field should be set to 0000 0001.
If only idle cells should be deleted, the “msk_rx_hd” should be set to 0000 0000.
If all physical layer cells should be deleted, the “msk_rx_hd” should be set to 1111
1110.
Octet 1
Octet 2
Octet 3
Octet 4
Idle cell identification (Notes
1 and 2)
0000/0000
0000/0000
0000/0000
0000/0001
Physical OAM cell
identification (Note 2) layer
0000/0000
0000/0000
0000/0000
0000/1001
Reserved for use of the
physical layer (Notes 1, 2
and 3)
PPPP/0000
0000/0000
0000/0000
0000/PPP1
P: Indicates the bit is available for use by the physical layer
Values assigned to these but have no meaning with respect to the fields occupying the corresponding bit
positions at the ATM layer
Notes:
1 In the case of physical layer cells, the bit in the location of the CLP indication is not used for the CLP
mechanism as specified in 3.4.2.3.2/I.150.
2 Cells having header values which are identified as idle, physical layer OAM, and reserved for use by the
physical layer are not passed to the ATM layer from the physical layer.
3 Specific pre-assigned physical layer cell header values are given in Recommendation I.432
Use
Octet 1
Octet 2
Octet 3
Octet 4
invalid
XXXX/0000
0000/0000
0000/0000
0000/XXX1
unassigned
0000/0000
0000/0000
0000/0000
0000/XXX0
X: Indicates “don’t care” bits