參數(shù)資料
型號: Q67100-H5101
廠商: SIEMENS AG
英文描述: NONVOLATILE MEMORY 8-KBIT EPROM WITH IC BUS INTERFACE
中文描述: 非易失性內(nèi)存8千比特存儲器總線接口帶IC
文件頁數(shù): 50/53頁
文件大?。?/td> 418K
代理商: Q67100-H5101
HYB39S64400/800/160BT(L)
64MBit Synchronous DRAM
Semiconductor Group
49
20.2 CAS Latency = 3
T14
Bx
Full Page burst operation does not
terminate when the burst length is satisfied;
the burst counter increments and continues
bursting beginning with the starting address.
BS
Command
Bank A
AP
DQM
DQ
Addr.
Command
Bank A
Activate
Hi-Z
Read
RAx
RAx
CAx
page address back to zero
during this time interval.
The burst counter wraps
from the highest order
Activate
Command
Bank B
Ax
Ax 1
2
Ax+
Ax
~
~
-
RBx
RBx
~
~
~
~
~
~
Ax
Read
Command
Bank B
Ax
2
1
Ax
1
Bx
Bx 1
CBx
T3
CLK
CKE
CS
RAS
WE
CAS
T0
High
CK3
t
T1
T2
~
~
~
~
~
~
~
T4
T5
~
~
~
T7
T6
T8
T10
T9
T11
T13
T12
SPT03930
Bank B
Command
Activate
Bank B
Precharge
Command
Burst Stop
Command
+
+2
Bx
Bx
3
4
+
5
+
Bx
RBy
t
RRD
RBy
T20
Burst Length = Full Page, CAS Latency = 3
T17
T15
T16
T18
T19
T21 T22
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