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參數(shù)資料
| 型號： | QS5917T-100TQ |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | GIGATRUE 550 CAT6 YELLOW STRANDED BULK 1000FT |
| 中文描述： | 5917 SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | QSOP-28 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大小： | 62K |
| 代理商： | QS5917T-100TQ |
INDUSTRIAL TEMPERATURE RANGE
2
QS5917T
LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
PIN CONFIGURATION
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz, V
IN
= 0V)
Symbol
Rating
Max
Unit
V
V
V
W
°C
Supply Voltage to Ground
DC Input Voltage V
IN
AC Input Voltage (pulse width
≤
20ns)
MaximumPower Dissipation (T
A
= 85°C)
Storage Temperature Range
–0.5 to +7
–0.5 to +7
–3
1.2
–65 to +150
T
STG
ABSOLUTE MAX IMUM RATINGS
(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUMRATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximumrating
conditions for extended periods may affect reliability.
20
19
18
15
16
23
22
24
21
17
V
DD
GND
PLL_EN
GND
Q/2
Q
3
LOCK
V
DD
2xQ
Q
1
25
28
27
26
V
DD
Q
2
GND
Q
4
2
3
1
9
10
AV
DD
NC
RST
SYNC
0
FEEDBACK
AGND
5
6
7
4
8
Q
5
11
12
FREQ_SEL
SYNC
1
GND
V
DD
REF_SEL
13
14
Q
0
GND
QSOP
TOP VIEW
PLCC
TOP VIEW
R
V
D
Q
5
G
Q
4
V
D
2
Q/2
GND
Q
3
V
DD
Q
2
GND
LOCK
P
G
Q
1
V
D
Q
0
G
F
FEEDBACK
REF_SEL
SYNC
0
AV
DD
NC
AGND
SYNC
1
28
4
3
2
1
27
26
25
24
23
22
21
20
19
5
6
7
8
9
10
11
12
13
14
15
16
17
18
QSOP
PLCC
Parameter
C
IN
Typ.
3
Max.
4
Typ.
4
Max.
6
Unit
pF
C
OUT
7
9
8
10
pF
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| QS5917T-132TJ | GIGATRUE 550 CAT PATCH CBL SNAGLSS 1FT BG 25 PK |
| QS5917T-132TQ | GIGATRUE 550 CAT6 PATCH 2 FT, SNAGLESS, BEIGE |
| QS5917T | LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5917T-70TJ | LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5917T-70TQ | LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| QS5917T-100TQG | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 CLK DRVR PLL, FILTER RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| QS5917T-100TQG8 | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Driver Single 28-Pin QSOP T/R 制造商:Integrated Device Technology Inc 功能描述:PLL CLOCK DRVR SGL 28QSOP - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:CLK DRVR PLL, FILTER |
| QS5917T-132TJ | 制造商:Integrated Device Technology Inc 功能描述:IDT QS5917T-132TJ PLL - Rail/Tube |
| QS5917T-132TJ8 | 制造商:Integrated Device Technology Inc 功能描述:Clock Generators & Support Products CLK DRVR PLL, FILTER |
| QS5917T-132TJG | 制造商:Integrated Device Technology Inc 功能描述:IDT QS5917T-132TJG PLL - Rail/Tube |
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