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參數(shù)資料
| 型號： | QS5919T100J |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| 中文描述： | PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 129K |
| 代理商： | QS5919T100J |
6
INDUSTRIAL TEMPERATURE RANGE
QS5919T
LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER
1.0ns
1.0ns
2.0V
0.8V
3.0V
0V
V
th
= 1.5V
2.0V
0.8V
0V
1.5V
t
PW
t
R
t
F
CONTROL
INPUT
ENABLE
DISABLE
3V
1.5V
0V
3.5V
V
OL
0V
t
PZL
1.5V
1.5V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
SWITCH
CLOSED
0.3V
0.3V
t
PZH
t
PLZ
t
PHZ
V
OH
300
30pF
7.0V
OUTPUT
20pF
V
DD
OUTPUT
300
160
68
AC TEST LOADS AND WAVEFORMS
TEST CIRCUIT 1
TTL INPUT TEST WAVEFORM
TTL OUTPUT WAVEFORM
TEST CIRCUIT 2
ENABLE AND DISABLE TIMES
TEST CIRCUIT 1 is used for output enable/disable parameters.
TEST CIRCUIT 2 is used for all other timing parameters.
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| QS5919T100Q | LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5919T133J | LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5919T133Q | LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5919T160J | LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| QS5919T100Q | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5919T-100TJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Eight Distributed-Output Clock Driver |
| QS5919T-100TQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Eight Distributed-Output Clock Driver |
| QS5919T133J | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
| QS5919T133Q | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER |
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