參數(shù)資料
型號(hào): R5F56218BDLD#U0
廠商: Renesas Electronics America
文件頁數(shù): 31/148頁
文件大?。?/td> 0K
描述: MCU 32BIT FLASH 512K ROM 85TFLGA
產(chǎn)品培訓(xùn)模塊: RX USB Peripheral
CAN Peripheral and API
RX 12-Bit ADC
RX Bus State Controller
RX Low Voltage Detection and Reset Sources
RX Watchdog Timer
RX 10-Bit ADC
RX 10-Bit DAC
RX Core
RX Compare Match Timer
RX DMAC
特色產(chǎn)品: RX600 Series Microcontrollers
標(biāo)準(zhǔn)包裝: 1
系列: RX600
核心處理器: RX
芯體尺寸: 32-位
速度: 100MHz
連通性: CAN,EBI/EMI,I²C,SCI,SPI,USB
外圍設(shè)備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 58
程序存儲(chǔ)器容量: 512KB(512K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10/12b,D/A 1x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 85-TFLGA
包裝: 托盤
PIC18F6520/8520/6620/8620/6720/8720
DS39609B-page 124
2004 Microchip Technology Inc.
TABLE 10-15: PORTH FUNCTIONS
TABLE 10-16: SUMMARY OF REGISTERS ASSOCIATED WITH PORTH
Name
Bit#
Buffer Type
Function
RH0/A16
bit 0
ST/TTL(1)
Input/output port pin or address bit 16 for external memory interface.
RH1/A17
bit 1
ST/TTL(1)
Input/output port pin or address bit 17 for external memory interface.
RH2/A18
bit 2
ST/TTL(1)
Input/output port pin or address bit 18 for external memory interface.
RH3/A19
bit 3
ST/TTL(1)
Input/output port pin or address bit 19 for external memory interface.
RH4/AN12
bit 4
ST
Input/output port pin or analog input channel 12.
RH5/AN13
bit 5
ST
Input/output port pin or analog input channel 13.
RH6/AN14
bit 6
ST
Input/output port pin or analog input channel 14.
RH7/AN15
bit 7
ST
Input/output port pin or analog input channel 15.
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1:
Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in System Bus or Parallel
Slave Port mode.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
TRISH
PORTH Data Direction Control Register
1111 1111
PORTH
Read PORTH pin/Write PORTH Data Latch
xxxx xxxx
uuuu uuuu
LATH
Read PORTH Data Latch/Write PORTH Data Latch
xxxx xxxx
uuuu uuuu
ADCON1
VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0 --00 0000
--00 0000
MEMCON
EBDIS
WAIT1
WAIT0
WM1
WM0
0-00 --00
Legend: x = unknown, u = unchanged, – = unimplemented. Shaded cells are not used by PORTH.
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