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參數(shù)資料
| 型號： | R5F64213KFB |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 42/50頁 |
| 文件大小： | 777K |
| 代理商： | R5F64213KFB |
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120
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
Bit 5 – Reserved
This bit is reserved for future use. For ensuring compatibility with future devices, this bit must be written to zero
when TCCR1B is written.
Bit 4:3 – WGM1[3:2]: Waveform Generation Mode
See TCCR1A Register description.
Bit 2:0 – CS1[2:0]: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see Figure 16-10 and Figure
If external pin modes are used for the Timer/Counter1, transitions on the T1 pin will clock the counter even if the
pin is configured as an output. This feature allows software control of the counting.
16.11.3
TCCR1C – Timer/Counter1 Control Register C
Bit 7 – FOC1A: Force Output Compare for Unit A
Bit 6 – FOC1B: Force Output Compare for Unit B
The FOC1A/FOC1B bits are only active when the WGM1[3:0] bits specifies a non-PWM mode. However, for ensur-
ing compatibility with future devices, these bits must be set to zero when TCCR1A is written when operating in a
PWM mode. When writing a logical one to the FOC1A/FOC1B bit, an immediate compare match is forced on the
Waveform Generation unit. The OC1A/OC1B output is changed according to its COM1x[1:0] bits setting. Note that
the FOC1A/FOC1B bits are implemented as strobes. Therefore it is the value present in the COM1x[1:0] bits that
determine the effect of the forced compare.
A FOC1A/FOC1B strobe will not generate any interrupt nor will it clear the timer in Clear Timer on Compare match
(CTC) mode using OCR1A as TOP. The FOC1A/FOC1B bits are always read as zero.
16.11.4
TCNT1H and TCNT1L – Timer/Counter1
Table 16-6.
Clock Select Bit description.
CS12
CS11
CS10
Description
0
No clock source (Timer/Counter stopped).
00
1
clk
I/O/1 (No prescaling)
01
0
clkI/O/8 (From prescaler)
01
1
clkI/O/64 (From prescaler)
10
0
clk
I/O/256 (From prescaler)
10
1
clkI/O/1024 (From prescaler)
1
0
External clock source on T1 pin. Clock on falling edge.
1
External clock source on T1 pin. Clock on rising edge.
Bit
765
4
3
210
(0x82)
FOC1A
FOC1B
–
TCCR1C
Read/Write
R/W
RR
R
Initial Value
0
Bit
765
432
10
(0x85)
TCNT1[15:8]
TCNT1H
(0x84)
TCNT1[7:0]
TCNT1L
Read/Write
R/W
Initial Value
000
00
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