Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
108
Datasheet
250687-002
R
4.1.3.
ISA Hole Memory Space
BIOS software may optionally open a “window” between 15 MB and 16 MB (0_00F0_0000h to
0_00FF_FFFF) that relays transactions to hub interface instead of completing them with a system
memory access. This window is opened with the FDHC.HEN configuration field.
Figure 7. Detailed Extended Memory Range Address Map
Key
1_0000_0000 (4GB)
Local Apic Space
FEF0_0000
FEE0_0000
Hub interface_D-E I/O
Apic Space
FED0_0000
Top of Low Memory (TOM)
FEC0_0000
Hub interface_A I/O
Apic Space
FEC8_0000
High BIOS, optional
extended SMRAM
FF00_0000
=
Region allowed for AGP/PCI
=
DRAM Region
100A_0000
Extended SMRAM
(translated to < 1MB)
100C_0000
00F0_0000 (15 MB)
ISA Hole
0100_0000 (16 MB)
0010_0000 (1MB)
=
Optional DRAM Region
=
Hub interface_A (always)
Extended SMRAM
Space
TEM - TSEG
4.1.4.
TSEG SMM Memory Space
TSEGSMM
From
TOM – TSEG
To
TOM
The TSEG SMM space allows system management software to partition a region of main memory just
below the top of low memory (TOM) that is accessible only by system management software. This
region may be 128 kB, 256 kB, 512 kB, or 1 MB in size, depending upon the ESMRAMC.TSEG_SZ
field. SMM memory is globally enabled by SMRAM.G_SMRARE. Requests may access SMM system
memory when either SMM space is open (SMRAM.D_OPEN) or the MCH-M receives an SMM code
request on its system bus. In order to access the TSEG SMM space, the TSEG must be enabled by
ESMRAMC.T_EN. When all of these conditions are met, then a system bus access to the TSEG space
(between TOM-TSEG and TOM) is sent to system memory. If the high SMRAM is not enabled or if the
TSEG is not enabled, then all memory requests from all interfaces are forwarded to system memory. If
the TSEG SMM space is enabled, and an agent attempts a non-SMM access to TSEG space, then the
transaction is specially terminated.
Hub interface and AGP originated accesses are not allowed to SMM space.