<source id="9ba4s"></source>
      <small id="9ba4s"></small>

      1. <code id="9ba4s"><del id="9ba4s"></del></code>

      2. 參數(shù)資料
        型號: RG82845
        英文描述: Controller Miscellaneous - Datasheet Reference
        中文描述: 控制器雜項-數(shù)據(jù)表參考
        文件頁數(shù): 29/157頁
        文件大?。?/td> 1407K
        代理商: RG82845
        Intel
        82845MP/82845MZ Chipset-Mobile (MCH-M)
        124
        Datasheet
        250687-002
        R
        5.4.3.
        General Description of ACPI System States
        S0 (Awake): In this state all power planes are active.
        S1-M (Powered on Suspend for Mobile Systems): Power is maintained to the CPU and all system
        components, but most clocks are stopped by the clock synthesizer.
        S2: ACPI S2 state is not supported in the Intel 845MP/845MZ Chipset platform.
        S3 (Suspend To RAM): The next level of power reduction occurs when the clock synthesizer and
        core well power planes for the processor and chipset are shut down, but the main memory power
        plane and the ICH3-M resume well remain active. This is the Suspend To RAM (STR) state. All
        clocks from synthesizers are shut down during the S3 state.
        S4 (Suspend to Disk) and S5 (Soft Off): In these states the main memory power plane is shut
        down in addition to the clock synthesizer and core well power planes for the processor and chipset.
        The ICH3-M resume well is still powered.
        G3 (Mechanical Off): In this state only the RTC (Real Time Clock) well is powered. The system
        can only be reactivated via the power switch.
        5.4.4.
        Power Transitions
        Table 33. Intel 845MP/845MZ Power Transitions
        ACPI
        State/Feature
        CO
        C1
        C2/S1D
        C3/C4
        S1M
        DDR
        Active/Standby
        & Nap
        Active/Standby
        & Nap
        Nap, Active, &
        Standby
        Power-down
        RAC
        Active
        Power-down
        DRCG
        Running
        Clock Stop
        Mode
        Power-down
        Clock Gating
        Yes (during
        writes)
        Yes (during
        writes)
        Yes (enabled
        during snoops)
        Yes
        GTL Control
        Buffer Sense
        Amp Disable
        No
        Yes
        Hublink Interface
        Active
        Power-down
        REQ1
        CPU PLL
        Running
        AGP/Hublink
        PLL
        Running
        Intel SpeedStep
        Technology
        Transition
        No
        Dynamic RAC
        Power
        Reduction
        Enabled
        相關PDF資料
        PDF描述
        RG82845MP Controller Miscellaneous - Datasheet Reference
        RG82845MZ Controller Miscellaneous - Datasheet Reference
        RG82870P2 Controller Miscellaneous - Datasheet Reference
        RH5RE36AA-T1-FA 3.6 V FIXED POSITIVE LDO REGULATOR, 0.7 V DROPOUT, PSSO3
        RH5RE56AA-T1-FA 5.6 V FIXED POSITIVE LDO REGULATOR, 0.7 V DROPOUT, PSSO3
        相關代理商/技術參數(shù)
        參數(shù)描述
        RG82845 S L5V7 制造商:Intel 功能描述:MEMORY CONTROLLER HUB (MCH) FOR SDR
        RG82845 S L5YQ 制造商:Intel 功能描述:MEMORY CONTROLLER HUB (MCH) FOR SDR
        RG82845 S L63W 制造商:Intel 功能描述:MEMORY CONTROLLER HUB (MCH) FOR SDR
        RG82845 SL5V7 制造商:Intel 功能描述:
        RG82845E 制造商:Rochester Electronics LLC 功能描述:- Bulk