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| 型號： | RTL8100B(L) |
| 英文描述： | RTL8100B(L) Specification |
| 中文描述： | RTL8100B（長）規(guī)格 |
| 文件頁數(shù)： | 23/58頁 |
| 文件大?。?/td> | 616K |
| 代理商： | RTL8100B(L) |
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RTL8100B(L)
2001-11-9
Rev.1.41
23
5.14 CONFIG 4: Configuration Register4
(Offset 005Ah, R/W)
Bit
7
R/W
R/W
Symbol
RxFIFOAutoClr
Description
Set to 1, the RTL8100B(L) will clear the Rx FIFO overflow
automatically.
Analog Power Off:
This bit can not be auto-loaded from EEPROM
(93C46).
1: Turn off the analog power of the RTL8100B(L) internally.
0: Normal working state. This is also power-on default value.
Long Wake-up Frame:
The initial value comes from EEPROM
autoload.
Set to 0: The RTL8100B(L) supports up to 8 wake-up frames, each
with masked bytes selected from offset 12 to 75.
Set to 1: The RTL8100B(L) supports up to 5 wake-up frames, each
with 16-bit CRC algorithm for MS Wakeup Frame, the low byte of
16-bit CRC should be placed at the correspondent CRC register, and
the high byte of 16-bit CRC should be placed at the correspondent
LSBCRC register. The wake-up frame 0 and 1 are the same as above,
except that the masked bytes start from offset 0 to 63. The wake-up
frame 2 and 3 are merged into one long wake-up frame respectively
with masked bytes selected from offset 0 to 127. The wake-up frame 4
and 5, 6 and 7 are merged respectively into another 2 long wake-up
frames. Please refer to 7.4 PCI Power Management functions for a
detailed description.
LANWAKE vs PMEB:
Set to 1: The LWAKE can only be asserted when the PMEB is
asserted and the ISOLATEB is low.
Set to 0: The LWAKE and PMEB are asserted at the same time.
Reserved
LWAKE pattern:
Please refer to LWACT bit in CONFIG1 register.
Reserved
Pre-Boot Wakeup:
The initial value comes from EEPROM autoload.
1: Pre-Boot Wakeup disabled. (suitable for CardBus and MiniPCI
applications)
0: Pre-Boot Wakeup enabled.
6
R/W
AnaOff
5
R/W
LongWF
4
R/W
LWPME
3
2
1
0
-
-
R/W
-
R/W
LWPTN
-
PBWakeup
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