參數(shù)資料
型號(hào): S12BFV1
廠商: Motorola, Inc.
英文描述: MC9S12DT128 Device User Guide V02.09
中文描述: MC9S12DT128設(shè)備的用戶手冊(cè)V02.09
文件頁數(shù): 132/138頁
文件大?。?/td> 2083K
代理商: S12BFV1
MC9S12DT128 Device User Guide — V02.09
132
32
D NOACC hold time
t
NOH
2
ns
33
D IPIPO[1:0] delay time
t
P0D
2
7
ns
34
D IPIPO[1:0] valid time to E rise (PW
EL
–t
P0D
)
t
P0V
11
ns
35
D IPIPO[1:0] delay time
(1)
(PW
EH
-t
P1V
)
t
P1D
2
25
ns
36
D IPIPO[1:0] valid time to E fall
t
P1V
11
ns
NOTES
:
1. Affected by clock stretch: add N x t
cyc
where N=0,1,2 or 3, depending on the number of clock stretches.
Table A-20 Expanded Bus Timing Characteristics
Conditions are shown in
Table A-4
unless otherwise noted, C
LOAD
= 50pF
Num C
Rating
Symbol
Min
Typ
Max
Unit
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S12BFV1D 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MC9S12DT128B
S12B-J21DK-GGXR(LF)(AU) 制造商:JST Manufacturing 功能描述:12 position 2.5mm Board to Board Header
S12B-J25DK-GGR(LF)(SN) 制造商:JST Manufacturing 功能描述:12 Circuit 17.5mm by 22.3mm Side Entry Header
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