參數(shù)資料
型號： S12FTS128KV2D
廠商： Motorola, Inc.
英文描述： MC9S12DT128 Device User Guide V02.09
中文描述： MC9S12DT128設(shè)備的用戶手冊V02.09
文件頁數(shù)： 13/138頁
文件大?。?/td> 2083K
代理商： S12FTS128KV2D
MC9S12DT128 Device User Guide — V02.09
13
List of Figures
Figure 0-1
Figure 1-1
Figure 1-2
Figure 2-1
MC9S12DG128E, MC9S12DG128, MC9S12DJ128E, MC9S12DJ128, and MC9S12DB12858
Figure 2-2
Pin Assignments in 80 QFP for MC9S12DG128E, MC9S12DG128,
MC9S12DJ128E, and MC9S12DJ128 Bondout59
Figure 2-3
Pin Assignments in 80 QFP for MC9S12DB128 Bondout. . . . . . . . . . . . . . . . . .60
Figure 2-4
PLL Loop Filter Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64
Figure 2-5
Colpitts Oscillator Connections (PE7=1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66
Figure 2-6
Pierce Oscillator Connections (PE7=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66
Figure 2-7
External Clock Connections (PE7=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66
Figure 3-1
Clock Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
Figure 23-1 Recommended PCB Layout for 112LQFP Colpitts Oscillator . . . . . . . . . . . . . . .91
Figure 23-2 Recommended PCB Layout for 80QFP (MC9S12DG128E, MC9S12DG128,
MC9S12DJ128E, and MC9S12DJ128) Colpitts Oscillator92
Figure 23-3 Recommended PCB Layout for 112LQFP Pierce Oscillator . . . . . . . . . . . . . . . .93
Figure 23-4 Recommended PCB Layout for 80QFP (MC9S12DG128E, MC9S12DG128,
MC9S12DJ128E, and MC9S12DJ128) Pierce Oscillator94
Figure 23-5 Recommended PCB Layout for 80QFP (MC9S12DB128) Pierce Oscillator. . . .95
Figure A-1
ATD Accuracy Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Figure A-2
Basic PLL functional diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Figure A-3
Jitter Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Figure A-4
Maximum bus clock jitter approximation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Figure A-5
SPI Master Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Figure A-6
SPI Master Timing (CPHA =1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Figure A-7
SPI Slave Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Figure A-8
SPI Slave Timing (CPHA =1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Figure A-9
General External Bus Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Figure 23-6 112-pin LQFP mechanical dimensions (case no. 987) . . . . . . . . . . . . . . . . . . .134
Order Partnumber Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
MC9S12DT128 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
MC9S12DT128 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Pin assignments 112 LQFP for MC9S12DT128E, MC9S12DT128,
相關(guān)PDF資料
PDF描述
S12MEBIV3 MC9S12DT128 Device User Guide V02.09
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S12SCIV2D MC9S12DT128 Device User Guide V02.09
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S12G 功能描述:整流器 400V 12A Std. Recovery RoHS:否 制造商:Vishay Semiconductors 產(chǎn)品:Standard Recovery Rectifiers 配置: 反向電壓:100 V 正向電壓下降: 恢復(fù)時間:1.2 us 正向連續(xù)電流:2 A 最大浪涌電流:35 A 反向電流 IR:5 uA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DO-221AC 封裝:Reel
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