參數(shù)資料
型號(hào): S12VREGV1
廠商: Motorola, Inc.
英文描述: MC9S12DT128 Device User Guide V02.09
中文描述: MC9S12DT128設(shè)備的用戶手冊V02.09
文件頁數(shù): 15/138頁
文件大?。?/td> 2083K
代理商: S12VREGV1
MC9S12DT128 Device User Guide — V02.09
15
List of Tables
Table 0-1
Table 0-2
Table 1-1
$0000 - $000F
$0010 - $0014
$0015 - $0016
$0017 - $0017
$0018 - $0019
$001A - $001B Device ID Register (
Table 1-3
) ................................................................33
$001C - $001D MMC map 3 of 4 (HCS12 Module Mapping Control,
Table 1-4
) ..............33
$001E - $001E MEBI map 2 of 3 (HCS12 Multiplexed External Bus Interface) ................33
$001F - $001F
INT map 2 of 2 (HCS12 Interrupt) ............................................................33
$0020 - $0027
Reserved ..................................................................................................34
$0028 - $002F
BKP (HCS12 Breakpoint) .........................................................................34
$0030 - $0031
MMC map 4 of 4 (HCS12 Module Mapping Control) ...............................34
$0032 - $0033
MEBI map 3 of 3 (HCS12 Multiplexed External Bus Interface) ................34
$0034 - $003F
CRG (Clock and Reset Generator) ..........................................................35
$0040 - $007F
ECT (Enhanced Capture Timer 16 Bit 8 Channels) .................................35
$0080 - $009F
ATD0 (Analog to Digital Converter 10 Bit 8 Channel) ..............................38
$00A0 - $00C7 PWM (Pulse Width Modulator 8 Bit 8 Channel) .......................................39
$00C8 - $00CF SCI0 (Asynchronous Serial Interface) ......................................................41
$00D0 - $00D7 SCI1 (Asynchronous Serial Interface) ......................................................41
$00D8 - $00DF SPI0 (Serial Peripheral Interface) ............................................................42
$00E0 - $00E7 IIC (Inter IC Bus) ......................................................................................42
$00E8 - $00EF BDLC (Byte Level Data Link Controller J1850) ........................................43
$00F0 - $00F7
SPI1 (Serial Peripheral Interface) ............................................................43
$00F8 - $00FF Reserved ..................................................................................................43
$0100 - $010F
Flash Control Register (fts128k2) ............................................................44
$0110 - $011B
EEPROM Control Register (eets2k) ........................................................44
$011C - $011F Reserved for RAM Control Register ........................................................45
$0120 - $013F
ATD1 (Analog to Digital Converter 10 Bit 8 Channel) ..............................45
$0140 - $017F
CAN0 (Motorola Scalable CAN - MSCAN) ..............................................46
Table 1-2
Detailed MSCAN Foreground Receive and Transmit Buffer Layout. . . . . . . . . . .47
Derivative Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Document References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Device Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
MEBI map 1 of 3 (HCS12 Multiplexed External Bus Interface) ................32
MMC map 1 of 4 (HCS12 Module Mapping Control) ...............................32
INT map 1 of 2 (HCS12 Interrupt) ............................................................33
MMC map 2 of 4 (HCS12 Module Mapping Control) ...............................33
Reserved ..................................................................................................33
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