參數(shù)資料
型號： S1C60N05D0A0100
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, UUC53
封裝： DIE-53
文件頁數(shù)： 57/95頁
文件大小： 736K
代理商： S1C60N05D0A0100
63
7674F–AVR–09/09
ATmega164P/324P/644P
When the BOOTRST Fuse is programmed and the Boot section size set to 8K bytes, the most
typical and general program setup for the Reset and Interrupt Vector Addresses is:
Address Labels Code
Comments
.org 0x0002
0x00002
jmp
EXT_INT0
; IRQ0 Handler
0x00004
jmp
EXT_INT1
; IRQ1 Handler
...
;
0x00036
jmp
SPM_RDY
; SPM Ready Handler
;
.org 0x1F000
0x1F000 RESET: ldi
r16,high(RAMEND); Main program start
0x1F001
out
SPH,r16
; Set Stack Pointer to top of RAM
0x1F002
ldi
r16,low(RAMEND)
0x1F003
out
SPL,r16
0x1F004
sei
; Enable interrupts
0x1F005
<instr>
xxx
When the BOOTRST Fuse is programmed, the Boot section size set to 8K bytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses is:
Address Labels Code
Comments
;
.org 0x1F000
0x1F000
jmp
RESET
; Reset handler
0x1F002
jmp
EXT_INT0
; IRQ0 Handler
0x1F004
jmp
EXT_INT1
; IRQ1 Handler
...
;
0x1F036
jmp
SPM_RDY
; SPM Ready Handler
;
0x1F03E RESET: ldi
r16,high(RAMEND); Main program start
0x1F03F
out
SPH,r16
; Set Stack Pointer to top of RAM
0x1F040
ldi
r16,low(RAMEND)
0x1F041
out
SPL,r16
0x1F042
sei
; Enable interrupts
0x1FO43
<instr>
xxx
10.2.1
Moving Interrupts Between Application and Boot Space
The General Interrupt Control Register controls the placement of the Interrupt Vector table.
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