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參數資料
| 型號： | S6C0670 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 8 BIT 384 / 402 CHANNEL TFT-LCD SOURCE DRIVER |
| 中文描述： | 8位402分之384通道TFT - LCD的源驅動 |
| 文件頁數： | 27/32頁 |
| 文件大?。?/td> | 332K |
| 代理商： | S6C0670 |
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8 BIT 384 / 402 CHANNEL TFT-LCD SOURCE DRIVER
S6C0670
27
DC CHARACTERISTICS
Table 5. DC Characteristics (Ta = -20 to 75
°
C, VDD1 = 2.5 to 3.6 V, VDD2 = 8 to 15 V, VSS1 = VSS2 = 0 V)
Parameter
Symbol
VIH
VIL
IL
Condition
Min.
Typ.
-
-
-
Max.
VDD1
0.2 VDD1
1
Unit
High level input voltage
Low level input voltage
Input leakage current
High level output
voltage
Low level output voltage
0.8 VDD1
0
-1
V
SHL, CLK2, D00 - D57, CLK1,
SELT, DATPOL1, DATPOL2,
DEC, POL, DIO1 (DIO2)
μ
A
VOH
DIO1 (DIO2), IO = -1.0 mA
VDD1 - 0.5
-
-
VOL
R0 -
R254
DIO1 (DIO2), IO = +1.0 mA
Refer to Table 1. Resistor
Strings
VDD2 = 10.0 V,
Vx = 3.5 V, Vyo = 9.5 V
(1)
VDD2 = 10.0 V,
Vx = 6.5 V, Vyo = 0.5 V
(1)
VSS2 + 0.1 V to VDD2 - 1.5 V
VDD2 - 1.5 V to VDD2 - 0.1 V
-
-
0.5
V
Resistor
Rn
×
0.7
Rn
×
1.3
IVOH
-
-2.0
-1.0
mA
Driver output current
IVOL
1.0
2.0
-
mA
-
-
±
7
±
10
±
15
±
20
Output voltage deviation
VO
Output RMS voltage
deviation
dVrms
(2)
Input data: 00H to FFH
-
±
3
±
10
mV
Output voltage range
Vyo
Input data: 00H to FFH
VSS2 +
0.1
-
VDD2 –
0.1
V
Logic part dynamic
current
Driver part dynamic
current
IDD1
VDD1 = 3.0 V
(3)
-
4.0
7.0
IDD2
VDD2 = 10 V
(4)
-
10.0
15.0
mA
NOTES:
1. Vyo is the output voltage of analog output pins Y1 to Y402.
Vx is the voltage applied to analog output pins Y1 to Y402.
2. dVrms is a maximum deviation value from ideal difference between high output and low output at the same gray scale.
3. CLK1 period is defined to be 15.6
μ
s at fCLK2 = 54 MHz, DEC = L, data pattern = 10101010
(checkerboard pattern), Ta = 25
°
C.
4, Yout Load Condition
VCOM = 0.5 VDD2
2k
4k
4k
20pF
40pF
20pF
YOUT
2k
4k
4k
Figure 5. Yout Load Condition
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