參數(shù)資料
型號: S71GL064A04BFW0F3
廠商: Spansion Inc.
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory and RAM
中文描述: 堆疊式多芯片產(chǎn)品(MCP)的閃存和RAM
文件頁數(shù): 72/102頁
文件大小: 1606K
代理商: S71GL064A04BFW0F3
March 31, 2005 S71GL032A_00_A0
S71GL032A Based MCPs
71
Advance
Informatio n
Erase and Program Operations-S29GL032A Only
Notes:
1. Not 100% tested.
3. For 1–16 words/1–32 bytes programmed.
4. Effective write buffer specification is based upon a 16-word/32-byte write buffer operation.
5. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once
programming resumes (that is, the program resume command has been written). If the suspend command was issued after
tPOLL, status data is available immediately after programming resumes. See Figure 16.
Parameter
Description
Speed Options
Unit
JEDEC
Std.
90
10
11
tAVAV
tWC
Write Cycle Time (Note 1)
Min
90
100
110
ns
tAVWL
tAS
Address Setup Time
Min
0
ns
tASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
tWLAX
tAH
Address Hold Time
Min
45
ns
tAHT
Address Hold Time From CE# or OE# high during toggle bit polling
Min
0
ns
tDVWH
tDS
Data Setup Time
Min
35
ns
tWHDX
tDH
Data Hold Time
Min
0
ns
tCEPH
CE# High during toggle bit polling
Min
20
ns
tOEPH
OE# High during toggle bit polling
Min
20
ns
tGHWL
Read Recovery Time Before Write (OE# High to WE# Low)
Min
0
ns
tELWL
tCS
CE# Setup Time
Min
0
ns
tWHEH
tCH
CE# Hold Time
Min
0
ns
tWLWH
tWP
Write Pulse Width
Min
35
ns
tWHDL
tWPH
Write Pulse Width High
Min
30
ns
tWHWH1
Write Buffer Program Operation (Notes 2, 3)
Typ
240
s
Single Word Program Operation (Note 2)
Typ
60
Accelerated Single Word Program Operation (Note 2)
Typ
54
tWHWH2
Sector Erase Operation (Note 2)
Typ
0.5
sec
tVHH
VHH Rise and Fall Time (Note 1)
Min
250
ns
tVCS
VCC Setup Time (Note 1)
Min
50
s
tBUSY
WE# High to RY/BY# Low
Min
90
100
110
ns
tPOLL
Program Valid before Status Polling
Max
4
s
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