參數(shù)資料
型號: S71JL064H80BAI020
廠商: ADVANCED MICRO DEVICES INC
元件分類: 存儲器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA73
封裝: 11.60 X 8 MM, FBGA-73
文件頁數(shù): 4/95頁
文件大?。?/td> 2244K
代理商: S71JL064H80BAI020
12
S71JLxxxHxx_00A1 February 25, 2004
Pr el i m i n ary
Special Package Handling Instructions
Special handling is required for Flash Memory products in molded packages
(FBGA). The package and/or data integrity may be compromised if the package
body is exposed to temperatures above 150°C for prolonged periods of time.
Pin Description
A18–A0
=
19 Address Inputs (Common)
A21–A19, A-1
=
4 Address Inputs (Flash)
SA
=
Highest Order Address Pin (SRAM) Byte mode
DQ15–DQ0
=
16 Data Inputs/Outputs (Common)
CE#f
=
Chip Enable (Flash)
CE#s
=
Chip Enable (SRAM)
OE#
=
Output Enable (Common)
WE#
=
Write Enable (Common)
RY/BY#
=
Ready/Busy Output
UB#
=
Upper Byte Control (SRAM)
LB#
=
Lower Byte Control (SRAM)
CIOf
=
I/O Configuration (Flash)
CIOf = VIH = Word mode (x16),
CIOf = VIL = Byte mode (x8)
CIOs
=
I/O Configuration (SRAM)
CIOs = VIH = Word mode (x16),
CIOs = VIL = Byte mode (x8)
RESET#
=
Hardware Reset Pin, Active Low
WP#/ACC
=
Hardware Write Protect/Acceleration Pin (Flash)
VCCf
=
Flash 3.0 volt-only single power supply (see Product
Selector Guide for speed options and voltage supply
tolerances)
VCCs
=
SRAM Power Supply
VSS
=
Device Ground (Common)
NC
=
Pin Not Connected Internally
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