- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372108 > SA8027W (NXP SEMICONDUCTORS) 2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer PDF資料下載
參數(shù)資料
| 型號： | SA8027W |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | 2.5 GHz low voltage, low power RF fractional-N/IF integer frequency synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 2500 MHz, PQCC24 |
| 封裝： | PLASTIC, BCC-24 |
| 文件頁數(shù)： | 8/22頁 |
| 文件大?。?/td> | 231K |
| 代理商： | SA8027W |
Philips Semiconductors
Product data
SA8027
2.5 GHz low voltage, low power
RF fractional-N/IF integer frequency synthesizer
2001 Aug 21
8
1.0
FUNCTIONAL DESCRIPTION
1.1
The RFin inputs drive a pre-amplifier to provide the clock to the first
divider stage. For single ended operation, the signal should be fed to
one of the inputs while the other one is AC grounded. The
pre-amplifier has a high input impedance, dominated by pin and pad
capacitance. The circuit operates with signal levels from –18 dBm to
0 dBm, and at frequencies as high as 2.5 GHz. The divider consists
of a fully programmable bipolar prescaler followed by a CMOS
counter. Total divide ratios range from 512 to 65535.
Main Fractional-N divider
The fractional modulus is selected by programming FMOD in the
A word. There are 2 modulus to select from: when FMOD = 0,
modulo 8 is selected; when FMOD = 1, modulo 5 is selected.
At the completion of a main divider cycle, a main divider output
pulse is generated which will drive the main phase comparator. Also,
the fractional accumulator is incremented by the value of NF. The
accumulator works with modulo set by FMOD. When the
accumulator overflows, the overall division ratio N will be increased
by 1, to N + 1. The average division ratio over modulo main divider
cycles (either 5 or 8) will be
Nfrac
N
NF
f
MOD
The output of the main divider will be modulated with a fractional
phase ripple. The phase ripple is proportional to the contents of the
fractional accumulator and is nulled by the fractional compensation
charge pump. Thus, f
VCO
= f
comp
* N
NF
f
MOD
.
The reloading of a new main divider ratio is synchronized to the
state of the main divider to avoid introducing a phase disturbance.
1.2
The AUXin input drives a pre-amplifier to provide the clock to the
first divider stage. The pre-amplifier has a high input impedance,
dominated by pin and pad capacitance. The circuit operates with
signal levels from –15 dBm to 0 dBm (112 to 632 mVpp), and at
frequencies as high as 550 MHz. The divider consists of a fully
programmable bipolar prescaler followed by a CMOS counter. Total
divide ratios range from 128 to 16383.
Auxiliary divider
1.3
The reference divider consists of a divider with programmable
values between 4 and 1023 followed by a three bit binary counter.
The 3 bit SM (SA) register (see Figure 6) determines which one of
the 5 output pulses are selected as the main (auxiliary) phase
detector input, thus allowing the main PFD and auxiliary PFD to
operate at different frequencies.
Reference divider
1.4
The reference and main (aux) divider outputs are connected to a
phase/frequency detector that controls the charge pump. The pump
current is set by an external resistor in conjunction with control bits
CP0 and CP1 in the C-word (see Table 1). The dead zone (caused
by finite time taken to switch the current sources on or off) is
cancelled by forcing the pumps ON for a minimum time (
τ
) at every
cycle (backlash time) providing improved linearity.
Phase detector (see Figure 7)
SR01415
DIVIDE BY R
/2
/2
/2
/2
REFERENCE
INPUT
SM=”000”
SM=”001”
SM=”010”
SM=”011”
SM=”100”
SA=”100”
SA=”011”
SA=”010”
SA=”001”
SA=”000”
TO
MAIN
PHASE
DETECTOR
TO
AUXILIARY
PHASE
DETECTOR
Figure 6.
Reference Divider
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SA8028 | 2.5 GHz sigma delta fractional-N / 760 MHz IF integer frequency synthesizers |
| SA8028W | ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85% |
| SA90-0001 | Vector Modulator, 1.94 to 2.24 GHz |
| SA90-0001-DC000 | Dual Linear Driver for Vector Modulators |
| SA90-0001TR | Vector Modulator, 1.94 to 2.24 GHz |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SA8028 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5 GHz sigma delta fractional-N / 760 MHz IF integer frequency synthesizers |
| SA8028W | 功能描述:鎖相環(huán) - PLL 2.5GHZ 760MHZ PLL SYNTHESIZER RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| SA8028W,518 | 功能描述:時鐘合成器/抖動清除器 2.5GHZ 760MHZ PLL RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SA8028W,557 | 功能描述:鎖相環(huán) - PLL 2.5GHZ 760MHZ PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| SA8028WGE | 功能描述:IC PLL FREQ SYNTHESIZER 24-HBCC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。