參數(shù)資料
型號: SAA2500H
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: MPEG Audio Source Decoder
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁數(shù): 21/47頁
文件大小: 199K
代理商: SAA2500H
September 1994
21
Philips Semiconductors
Preliminary specification
MPEG Audio Source Decoder
SAA2500
Fig.14 Baseband output data serial transfer format.
handbook, full pagewidth
WS
SCK
SD
MSB
left sample
LSB
MSB
right sample
LSB
1
16/18/20/22
32
1
16/18/20/22
32
valid data
MGB502
Table 11
Signals of output interfacing.
The frequency of clock SCK is 64 times the sample
frequency. (SCK is also used for the subband filter
interface).
The signal SD is the serial baseband audio data, sample
by sample (left/right interleaved. The left sample and the
right immediately following it form one stereo pair). 32 bits
are transferred per sample per channel. The samples are
transmitted in two's complement, MSB first. The output
samples are rounded to either 16, 18, 20 or 22 bit
precision, selectable by the host with L3 control interface
flags RND1 and RND0. The remainder of the
32 transferred bits per sample per channel are zero.
The word select signal WS indicates the channel of the
output samples (LOW if left, HIGH if right). (WS is used for
the subband filter interface as well.) If indicated in the
coded input data, de-emphasis filtering is performed
digitally on the output data, thus avoiding the need of
analog de-emphasis filter circuitry.
The L3 control interface
The SAA2500 uses the L3 protocol with the associated
bus as the control interface with an optional host
microcontroller (see Chapter “Appendix” for more
SIGNAL
DIRECTION
FUNCTION
SD
SCK
WS
output
output
output
baseband audio data
data clock
word select
information). In the programming sections a general
transfer protocol outline is presented. In
Section “SAA2500 L3 protocol enhancement options”
several optional protocol enhancements are given, which
on the one hand are less transparent from the applicant's
point of view, but on the other hand increase the efficiency
of the L3 interfacing.
L3
SIGNALS
The L3 protocol uses 3 signals (see Table 12).
Table 12
Signals of L3 protocol.
The signals operate according to the L3 protocol
description. After each device reset, the L3 interface of the
SAA2500 must be initialised and as a consequence, the
L3 interface cannot be used while the device reset signal
is activated.
L3
TRANSFER TYPES
The L3 protocol enables the reading and writing of control,
status and data. In the L3 protocol, the host first issues an
8 bit wide ‘operational address’ on L3DATA while keeping
L3MODE LOW. All devices connected to the L3 bus read
the operational address. Next, data transfers from or to the
SIGNAL
DIRECTION
FUNCTION
L3DATA
L3CLK
L3MODE
input/output
input
input
L3 interface serial data
L3 interface bit clock
L3 interface
address/data select
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