參數(shù)資料
型號(hào): SAA2500H
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: MPEG Audio Source Decoder
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁(yè)數(shù): 36/47頁(yè)
文件大?。?/td> 199K
代理商: SAA2500H
September 1994
36
Philips Semiconductors
Preliminary specification
MPEG Audio Source Decoder
SAA2500
Table 34
Requirements for timing (addressing mode); see Fig.19.
Data mode
Table 35
Requirements for timing (data mode); see Fig.20.
SYMBOL
PARAMETER
REQUIREMENT
190
250
250
190
30
190
UNIT
t
d1
t
cL
t
cH
t
su1
t
h1
t
h2
L3CLK HIGH to L3CLK LOW delay time after L3MODE LOW
L3CLK LOW time
L3CLK HIGH time
L3DATA set-up time before L3CLK HIGH
L3DATA hold time after L3CLK HIGH
L3CLK hold time before L3MODE HIGH
ns
ns
ns
ns
ns
ns
SYMBOL
PARAMETER
REQUIREMENT
190
250
250
UNIT
t
d1
t
cL
t
cH
L3CLK HIGH to L3CLK LOW delay time after L3MODE HIGH
L3CLK LOW time
L3CLK HIGH time
ns
ns
ns
Microcontroller to slave device
t
su1
t
h1
t
h2
L3DATA set-up time before L3CLK HIGH
L3DATA hold time after L3CLK HIGH
L3CLK hold time before L3MODE HIGH
190
30
190
ns
ns
ns
Slave device to microcontroller
t
d2
t
d3
t
h3
t
d4
t
d4
L3DATA enable time after L3MODE HIGH
L3DATA stable time after L3MODE HIGH
L3DATA hold time after L3CLK HIGH
L3DATA stable time after L3CLK HIGH
L3DATA stable time after L3CLK HIGH between bit 7 of a byte and
bit 0 of next byte if no halt mode is used
L3DATA disable time after L3MODE LOW
0 < t
d2
50
380
50
360
530
ns
ns
ns
ns
ns
t
d5
0 < t
d5
50
ns
Fig.20 Timing (data mode).
andbook, full pagewidth
MGB508
L3DATA
microcontroller
to IC
td1
h2
cL
t
cH
t
h1
t
su
t
t
d2
t
d3
t
h3
t
d4
t
d5
t
L3DATA
IC to
microcontroller
L3CLK
L3MODE
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