參數(shù)資料
型號: SAA2503
廠商: NXP Semiconductors N.V.
英文描述: MPEG2 audio decoder(MPEG2 音頻譯碼器)
中文描述: MPEG2音頻解碼器(的MPEG2音頻譯碼器)
文件頁數(shù): 11/20頁
文件大?。?/td> 139K
代理商: SAA2503
1997 Jul 02
11
Philips Semiconductors
Objective specification
MPEG2 audio decoder
SAA2503
AUDIO OUTPUTS INTERFACING
Also see Chapter “Interfacing to the A/V splitter”.
Stereo output for DAC
The output stereo down-mixing signal is in I
2
S-bus format
and can be directly connected to a DAC. The SDO0
(pin 57) provides the output for the serial audio data.
Furthermore, SCKT (pin 59) provides the I
2
S-bus clock
and WST (pin 60), the I
2
S-bus word select.
IEC 958 transmitter
The format of the IEC 958 interface consists of a sequence
of IEC 958 sub frames. Each IEC 958 sub frame is
normally used to carry one LPCM sample. The IEC 958
sub frame may also be used to convey data words.
The non-PCM encoded audio bitstreams to be transferred
are formed into data bursts. These bitstreams consist of a
sequence of data words.
Each data burst contains a 64-bit burst_preamble,
followed by the burst_payload.
The burst_preamble provides a sync_word, information on
the burst_payload and the bitstream number.
The interface may convey one or more bitstreams. Each
type of bitstream may impose a particular requirement for
the repetition time for the data bursts that make up the
bitstream.
The 16-bit data words of a data burst are placed in time
slots 12 to 27 of an IEC 958 sub frame. In the consumer
application, both odd and even IEC 958-sub frames (CH1
and CH2) are simultaneously used to carry 32-bit data
words (32-bit mode). This allows the consumer IEC 958 to
convey either 2-channel LPCM audio, or a set of
alternating data words, but not both simultaneously.
For more information see IEC 1937.
The IEC 958 interface is of the digital audio interface. This
conveys LPCM or encoded audio bitstreams according to
IEC 1937 (IEC 1937), using the ‘network layer’ of IEC 958
(IEC 958). The audio data will be accompanied by a
validity bit, channel status and user data (sub code).
Table 3
Pinning of IEC 958 interface
Note
1.
The ACI clock is 256f
s
(or 512 or 384f
s
).
PINS
DESCRIPTION
PIN NUMBER
DIRECTION
ADO
ACI
Audio Data Output
Audio Clock Input; note 1
30
31
output
input
INTERFACING WITH THE MICROCONTROLLER
Flags
The SAA2503 has 3 flags which, after a hardware reset,
are all initialized to logic 1.
1.
I
2
C-bus communication disabled (pin 80); I2CEN
:
this
flag is set to logic 0 when the SAA2503 is ready to
accept messages via the I
2
C-bus.
2.
Life test (pin 79); BUSY: when the SAA2503 operates
in the MPEG decoding mode, this flag toggles
whenever the SAA2503 has detected a
synchronization pattern. The flag will then produce a
20.833 Hz (f
as
= 48 kHz) and a 19.140 Hz
(f
as
= 44.1 kHz) signal. It can be used to monitor the
MPEG decoding process. When this flag no longer
toggles there is an error. When the SAA2503 operates
in one of the LPCM modes however, the flag produces
either a 23.437 Hz (f
as
= 48 kHz) or a 21.533 Hz
(f
as
= 44.1 kHz) signal.
3.
MPEG decoding active and synchronised (pin 77);
MUTE: when the SAA2503 operates in the MPEG
decoding mode, this flag indicates the state of the
SAA2503 (synchronized or not). When this pin is at
logic 1 the SAA2503 is out of sync, when set to logic 0
the SAA2503 is synchronized. It will not change state
when the SAA2503 remains synchronized. When the
SAA2503 is operating in one of the LPCM modes, the
MUTE pin is set at logic 1 during initialization and
logic 0 during processing.
I
2
C-bus interface
The I
2
C-bus interface supports data rates of up to
400 kbits/s. For a description of the I
2
C-bus see
“The I
2
C-bus and how to use it” ordering number
9398 393 40011.
For a description of the I
2
C-bus commands controlling the
SAA2503 see Table 1.
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