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參數(shù)資料
| 型號(hào)： | SAA5697HL |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Enhanced TV microcontrollers with On-Screen Display (OSD) |
| 中文描述： | 與微控制器在強(qiáng)化電視屏幕顯示（OSD） |
| 文件頁(yè)數(shù)： | 39/116頁(yè) |
| 文件大?。?/td> | 532K |
| 代理商： | SAA5697HL |
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2002 May 06
39
Philips Semiconductors
Objective specification
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA567x; SAA569x
There are three methods of exiting Power-down:
External interrupt. Since the clock is stopped, an
external interrupt needs to be set level sensitive prior to
entering Power-down. The interrupt is serviced and,
following the instruction RETI, the next instruction to be
executed will be the one after the instruction that put the
device into Power-down mode.
Interrupt generated by the SAD DC Compare circuit.
When the SAA567x; SAA569x is configured in this
mode, detection of a certain analog threshold at the
input to the SAD may be used to trigger wake-up of the
device, i.e. TV Front Panel Key-press. As above, the
interrupt is serviced and, following the instruction RETI,
the next instruction to be executed will be the one
following the instruction that put the device into
Power-down.
External hardware reset. This reset defines all SFRs
and Display memory, but maintains all other RAM
values. Code execution commences with the Program
Counter set to ‘0000’.
11 I/O FACILITY
The SAA567x; SAA569x devices have 32 I/O lines, each
of which can be individually addressed, or form four
parallel 8-bit addressable ports: Port 0, 1, 2 and 3.
I
2
C-bus ports (P1.4, P1.5, P1.6 and P1.7) can only be
configured as open-drain.
11.1
Port type
All individual ports can be programmed to function in one
of four modes, the mode is defined by two associated Port
Configuration Registers: PnCFGA and PnCFGB (where
n = port number 0, 1, 2 or 3). The modes available are
open-drain, quasi-bidirectional, high-impedance and
push-pull.
11.1.1
O
PEN
-
DRAIN
(5 V
TOLERANT
TTL)
The open-drain mode can be used for bidirectional
operation of a port and requires an external pull-up
resistor. The pull-up voltage has a maximum value of
5.5 V, to allow connection of the device into a 5 V
environment.
11.1.2
Q
UASI
-
BIDIRECTIONAL
(3.3 V
TOLERANT
CMOS)
The quasi-bidirectional mode is a combination of
open-drain and push-pull. It requires an external pull-up
resistor to V
DDP
(normally 3.3 V).
When a LOW-to-HIGH signal transition is output from the
device, the pad is put into push-pull mode for one clock
cycle (166 ns) after which the pad goes into open-drain
mode. This mode is used to speed up the edges of signal
transitions. This is the default mode of operation of the
pads after reset.
11.1.3
H
IGH
-
IMPEDANCE
(5 V
TOLERANT
TTL)
The high-impedance mode can be used for input only
operation of the port. When using this configuration, the
two output transistors are turned off.
11.1.4
P
USH
-
PULL
(3.3 V
TOLERANT
CMOS)
The push-pull mode can be used for output only. In this
mode, the signal is driven to either 0 V or V
DDP
, which is
nominally 3.3 V.
12 INTERRUPT SYSTEM
The device has 15 interrupt sources, each of which can be
enabled or disabled. When enabled, each interrupt can be
assigned one of two priority levels. There are five
interrupts that are common to the 80C51. Two of these are
external interrupts (EX0 and EX1); the other three are
timer interrupts (ET0, ET1 and ET2). In addition to the
conventional80C51,twoapplicationspecificinterruptsare
incorporated internal to the device, with the following
functionality:
Closed Caption Data Ready interrupt (ECC):
this
interrupt is generated when the device is configured in
Closed Caption Acquisition mode. The interrupt is
activated at the end of the currently selected Slice Line,
as defined in the CCLIN SFR.
Display Busy interrupt (EBUSY):
an interrupt is
generated when the display enters either a Horizontal or
Vertical Blanking Period. i.e. indicates when the
microcontroller can update the Display RAM without
causing undesired effects on the screen. This interrupt
can be configured in one of two modes using the
Memory Mapped Register (MMR) Configuration
Register (address 87FFH, bit TXT/V).
– Text Display Busy: an interrupt is generated on each
active horizontal display line when the Horizontal
Blanking Period is entered
– Vertical Display Busy: an interrupt is generated on
each vertical display field when the Vertical Blanking
Period is entered.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA5675HL | Enhanced TV microcontrollers with On-Screen Display (OSD) |
| SAA567X | Enhanced TV microcontrollers with On-Screen Display (OSD) |
| SAA5695HL | Enhanced TV microcontrollers with On-Screen Display (OSD) |
| SAA569x | Enhanced TV microcontrollers with On-Screen Display (OSD) |
| SAA5677HL | Enhanced TV microcontrollers with On-Screen Display (OSD) |
相關(guān)代理商/技術(shù)參數(shù) |
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| SAA569X | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Enhanced TV microcontrollers with On-Screen Display (OSD) |
| SAA5700 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Chinese Character System Teletext CCST decoder |
| SAA5700GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Chinese Character System Teletext CCST decoder |
| SAA5731 | 制造商:The Stanley Works 功能描述: |
| SAA5X9X | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Economy teletext and TV microcontrollers |
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