參數(shù)資料
型號: SAA6752HS
廠商: NXP Semiconductors N.V.
英文描述: MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer
中文描述: MPEG - 2視頻和MPEG-audio/AC-3音頻編碼器與復(fù)用器
文件頁數(shù): 8/71頁
文件大?。?/td> 2570K
代理商: SAA6752HS
2004 Jan 26
8
Philips Semiconductors
Product specification
MPEG-2 video and MPEG-audio/AC-3
audio encoder with multiplexer
SAA6752HS
6
PINNING
SYMBOL
PIN
INPUT/OUTPUT
(1)
I
max
(mA)
4
4
4
4
4
4
DESCRIPTION
V
SSP
SDATA1
SCLK1
SWS1
V
DDP
SDATA2
SCLK2
SWS2
ACLK
V
SSP
IDQ
1
2
3
4
5
6
7
8
9
10
11
ground
input
input/output
input/output
supply
input/output
input/output
input/output
output
ground
input
pad ground
I
2
S-bus serial data input port 1 with internal pull-down resistor
I
2
S-bus serial clock port 1 with internal pull-down resistor
I
2
S-bus word select port 1 with internal pull-down resistor
pad ring supply voltage (3.3 V)
I
2
S-bus serial data port 2 with internal pull-down resistor
I
2
S-bus serial clock port 2 with internal pull-down resistor
I
2
S-bus word select port 2 with internal pull-down resistor
audio clock output (256f
s
or 384f
s
)
pad ground
reserved input with internal pull-down resistor; (recommended
to connect to pin V
SSP
)
video input signal bit 0 (LSB)
video input signal bit 1
video input signal bit 2
video input signal bit 3
video input signal bit 4
video input signal bit 5
video input signal bit 6
video input signal bit 7 (MSB)
pad ground
horizontal sync input (video) with internal pull-down resistor
vertical sync input (video) with internal pull-down resistor
video field identification input (odd/even field) with internal
pull-down resistor
video clock input 1 (27 MHz) with internal pull-down resistor
core ground
core ground
core supply voltage (2.5 V)
core supply voltage (2.5 V)
pad ring supply voltage (3.3 V)
video clock input 2 (27 MHz) with internal pull-down resistor
parallel stream data output for audio/video identifier
parallel stream data input for data strobe [request for packet in
Data Expansion Bus Interface (DEBI) slave mode] with internal
pull-up resistor
parallel stream data output for packet sync
pad ground
parallel stream data valid output with internal pull-up resistor
parallel stream data output bit 0 (LSB)
YUV0
YUV1
YUV2
YUV3
YUV4
YUV5
YUV6
YUV7
V
SSP
HSYNC
VSYNC
FID
12
13
14
15
16
17
18
19
20
21
22
23
input
input
input
input
input
input
input
input
ground
input
input
input
VCLK1
V
SSCO
V
SSCO
V
DDCO
V
DDCO
V
DDP
VCLK2
PDOAV
PDIDS
24
25
26
27
28
29
30
31
32
input
ground
ground
supply
supply
supply
input
3-state output
input
4
PDOSYNC
V
SSP
PDOVAL
PDO0
33
34
35
36
3-state output
ground
3-state output
3-state output
4
4
4
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