參數(shù)資料
型號: SAA7105H
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Digital video encoder
文件頁數(shù): 40/71頁
文件大?。?/td> 354K
代理商: SAA7105H
2004 Mar 04
40
Philips Semiconductors
Product specification
Digital video encoder
SAA7104H; SAA7105H
Table 63
Subaddresses 78H, 79H and 7CH
Table 64
Subaddresses 7AH to 7CH
Table 65
Subaddress 7CH
Table 66
Subaddresses 7EH and 7FH
Table 67
Subaddresses 81H to 83H
DATA BYTE
DESCRIPTION
REMARKS
TTXEVS
first line of occurrence of signal TTXRQ on pin TTXRQ_XCLKO2
(CLK2EN = 0) in even field
line = (TTXEVS + 4) for M-systems
line = (TTXEVS + 1) for other systems
TTXEVS = 04H; is default
after reset if strapped to PAL
TTXEVS = 05H; is default
after reset if strapped to
NTSC
TTXEVE = 16H; is default
after reset if strapped to PAL
TTXEVE = 10H; is default
after reset if strapped to
NTSC
TTXEVE
last line of occurrence of signal TTXRQ on pin TTXRQ_XCLKO2
(CLK2EN = 0) in even field
line = (TTXEVE + 3) for M-systems
line = TTXEVE for other systems
DATA BYTE
DESCRIPTION
FAL
first active line = FAL + 4 for M-systems and FAL + 1 for other systems, measured in lines
FAL = 0 coincides with the first field synchronization pulse
last active line = LAL + 3 for M-systems and LAL for other system, measured in lines
LAL = 0 coincides with the first field synchronization pulse
LAL
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
TTX60
0
1
0
enables NABTS (FISE = 1) or European TTX (FISE = 0); default after reset
enables world standard teletext 60 Hz (FISE = 1)
new teletext protocol selected; at each rising edge of TTXRQ a single teletext bit is
requested (see Fig.15); default after reset
old teletext protocol selected; the encoder provides a window of TTXRQ going HIGH; the
length of the window depends on the chosen teletext standard (see Fig.15)
TTXO
1
DATA BYTE
DESCRIPTION
LINE
individual lines in both fields (PAL counting) can be disabled for insertion of teletext by the respective
bits, disabled line = LINExx (50 Hz field rate)
this bit mask is effective only if the lines are enabled by TTXOVS/TTXOVE and TTXEVS/TTXEVE
DATA BYTE
DESCRIPTION
PCL
defines the frequency of the synthesized pixel clock PIXCLKO;
2
24
; f
XTAL
= 27 MHz nominal, e.g. 640
×
480 to NTSC M: PCL = 20F63BH;
640
×
480 to PAL B/G: PCL = 1B5A73H (as by strapping pins)
f
PIXCLK
PCL
f
XTAL
×
8
×
=
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