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參數資料
| 型號： | SAA7110 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | Digital Multistandard Colour Decoder(數字多標準彩色譯碼器) |
| 中文描述： | COLOR SIGNAL DECODER, PQCC68 |
| 封裝： | PLASTIC, MO-047AC, SOT-188-2, LCC-68 |
| 文件頁數： | 8/76頁 |
| 文件大小： | 416K |
| 代理商： | SAA7110 |
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1995 Oct 18
8
Philips Semiconductors
Product specification
One Chip Front-end 1 (OCF1)
SAA7110; SAA7110A
Y7
Y6
Y5
Y4
Y3
Y2
V
SS
V
DD
Y1
Y0
UV7
UV6
UV5
UV4
UV3
UV2
UV1
UV0
FEIN
(MUXC)
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
Upper 6 bits of the 8-bit luminance (Y) digital output. As part of the digital YUV-bus
(data rate LLC/2), or A/D2(3) output (data rate LLC/2) selectable via I
2
C-bus bit SQPB = 1.
ground
supply voltage (+5 V)
Lower 2 bits of the 8-bit luminance (Y) digital output. As part of the digital YUV-bus
(data rate LLC/2), or A/D2(3) output (data rate LLC/2) selectable via I
2
C-bus bit SQPB = 1.
8-bit digital UV (colour difference) output; multiplexed colour difference signal for U and V
component of demodulated CVBS or chrominance signal. The format and multiplexing
scheme can be selected via I
2
C-bus control. These signals are part of the digital YUV-bus
(data rate LLC/2), or A/D3(2) output (data rate LLC/2) selectable via I
2
C-bus bit SQPB = 1.
Fast Enable input (active LOW); this signal is used to control fast switching on the digital
YUV-bus. A high at this input forces the IC to set its Y and UV outputs to the high impedance
state. To use this function set I
2
C-bus bits MS24 and MS34 and MUYC to LOW.
(Multiplex Components input; control signal for the analog multiplexers for fast switching
between locked Y/C signals or locked CVBS signals. FEIN automatically fixed to LOW (digital
YUV-bus enabled), if one of the three MUXC functions are selected (MS24 or MS34 or
MUYC = HIGH).
General Purpose Switch output; the state of this signal is programmable via I
2
C-bus register
0Dh, bit 1. Select GPSW function via I
2
C-bus bit VBLKA = 0. (Vertical Blank test output; select
VBLK via I
2
C-bus bit VBLKA = 1).
Crystal oscillator output (to 26.8 MHz crystal); not used if TTL clock is used.
Crystal oscillator input (from 26.8 MHz crystal) or connection of external oscillator with TTL
compatible square wave clock signal.
ground
supply voltage (+5 V)
GPSW
(VBLK)
64
XTALO
XTALI
65
66
V
SS
V
DD
67
68
SYMBOL
PIN
DESCRIPTION
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| SAA7111 | Video Input Processor VIP |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SAA7110/7110A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:One Chip Frontend 1 (OCF1) Product Specification |
| SAA7110A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:One Chip Front-end 1 OCF1 |
| SAA7110AWP/00 | 制造商:NXP Semiconductors 功能描述: |
| SAA7111 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Video Input Processor VIP |
| SAA7111A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Enhanced Video Input Processor EVIP |
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